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XC6118C08DMR-G Datasheet(PDF) 2 Page - Torex Semiconductor |
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XC6118C08DMR-G Datasheet(HTML) 2 Page - Torex Semiconductor |
2 / 20 page 2/20 XC6118 Series PIN NUMBER USP-4 SOT-25 PIN NAME FUNCTION 1 1 VOUT Output (Detect ”L”) 2 5 Cd Delay Capacitance (*1) 2 - NC No Connection 3 4 VSEN Sense 4 3 VIN Input 5 2 VSS Ground (*2) DESIGNATOR DESCRIPTION SYMBOL DESCRIPTION C CMOS output ① Output Configuration N N-ch open drain output ②③ Detect Voltage 08~50 e.g. 18 → 1.8V A Built-in delay capacitance pin, hysteresis 5% (TYP.)(Standard*) B Built-in delay capacitance pin, hysteresis less than 1%(Standard*) C No built-in delay capacitance pin, hysteresis 5% (TYP.) (Semi-custom) ④ Options D No built-in delay capacitance pin, hysteresis less than 1% (Semi-custom) GR-G USP-4 (Halogen & Antimony free) ⑤⑥-⑦ Packages Taping Type (*2) MR-G SOT-25 (Halogen & Antimony free) ■PIN CONFIGURATION ■PIN ASSIGNMENT ■PRODUCT CLASSIFICATION ●Ordering Information XC6118①②③④⑤⑥-⑦ (*1) 3 VSEN 4 VIN Cd/NC 2 VOUT 1 USP-4 (BOTTOM VIEW) SOT-25 (TOP VIEW) NOTE: *1: With the VSS pin of the USP-4 package, a tab on the backside is used as the pin No.5. *2: In the case of selecting no built-in delay capacitance pin type, the delay capacitance (Cd) pin will be used as the NC. * In the XC6118xxxA/B series, the dissipation pad should not be short-circuited with other pins. * In the XC6118xxxC/D series, when the dissipation pad is short-circuited with other pins, connect it to the NC pin (No.2) pin before use. 5 VSS *When delay function isn’t used, open the delay capacitance pin before use. (*1) The ”-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant. (*2) The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office or representative. (Standard orientation: ⑤R-⑦, Reverse orientation: ⑤L-⑦) |
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