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P89LPC917 Datasheet(PDF) 17 Page - NXP Semiconductors |
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P89LPC917 Datasheet(HTML) 17 Page - NXP Semiconductors |
17 / 75 page P89LPC915_916_917_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 15 December 2009 17 of 75 NXP Semiconductors P89LPC915/916/917 8-bit microcontrollers with accelerated two-clock 80C51 core [1] Input/output for P1.0 to P1.4. Input for P1.5. P2.2 5 Port 2: Port 2 is a single bit I/O port with a user-configurable output type. During reset Port 2 latches are configured in the input only mode with the internal pull-up disabled. The operation of this Port 2 pin as an input and output depends upon the port configuration selected. Refer to Section 8.13.1 “Port configurations” and Table 15 “Static characteristics” for details. This pin has a Schmitt triggered input. VSS 4I Ground: 0 V reference. VDD 12 I Power supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes. Table 6. P89LPC917 pin description …continued Symbol Pin Type Description |
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