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ATtiny48-MU Datasheet(PDF) 9 Page - ATMEL Corporation |
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ATtiny48-MU Datasheet(HTML) 9 Page - ATMEL Corporation |
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9 / 26 page  9 8008F–AVR–06/10 ATtiny48/88 (0xBE) TWHSR – – – – – – –TWHS 157 (0xBD) TWAMR TWAM6 TWAM5 TWAM4 TWAM3 TWAM2 TWAM1 TWAM0 –157 (0xBC) TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN –TWIE 154 (0xBB) TWDR 2-wire Serial Interface Data Register 156 (0xBA) TWAR TWA6 TWA5 TWA4 TWA3 TWA2 TWA1 TWA0 TWGCE 156 (0xB9) TWSR TWS7 TWS6 TWS5 TWS4 TWS3 –TWPS1 TWPS0 155 (0xB8) TWBR 2-wire Serial Interface Bit Rate Register 154 (0xB7) Reserved – – – – – – – – (0xB6) Reserved – – – – – – – – (0xB5) Reserved – – – – – – – – (0xB4) Reserved – – – – – – – – (0xB3) Reserved – – – – – – – – (0xB2) Reserved – – – – – – – – (0xB1) Reserved – – – – – – – – (0xB0) Reserved – – – – – – – – (0xAF) Reserved – – – – – – – – (0xAE) Reserved – – – – – – – – (0xAD) Reserved – – – – – – – – (0xAC) Reserved – – – – – – – – (0xAB) Reserved – – – – – – – – (0xAA) Reserved – – – – – – – – (0xA9) Reserved – – – – – – – – (0xA8) Reserved – – – – – – – – (0xA7) Reserved – – – – – – – – (0xA6) Reserved – – – – – – – – (0xA5) Reserved – – – – – – – – (0xA4) Reserved – – – – – – – – (0xA3) Reserved – – – – – – – – (0xA2) Reserved – – – – – – – – (0xA1) Reserved – – – – – – – – (0xA0) Reserved – – – – – – – – (0x9F) Reserved – – – – – – – – (0x9E) Reserved – – – – – – – – (0x9D) Reserved – – – – – – – – (0x9C) Reserved – – – – – – – – (0x9B) Reserved – – – – – – – – (0x9A) Reserved – – – – – – – – (0x99) Reserved – – – – – – – – (0x98) Reserved – – – – – – – – (0x97) Reserved – – – – – – – – (0x96) Reserved – – – – – – – – (0x95) Reserved – – – – – – – – (0x94) Reserved – – – – – – – – (0x93) Reserved – – – – – – – – (0x92) Reserved – – – – – – – – (0x91) Reserved – – – – – – – – (0x90) Reserved – – – – – – – – (0x8F) Reserved – – – – – – – – (0x8E) Reserved – – – – – – – – (0x8D) Reserved – – – – – – – – (0x8C) Reserved – – – – – – – – (0x8B) OCR1BH Timer/Counter1 – Output Compare Register B High Byte 112 (0x8A) OCR1BL Timer/Counter1 – Output Compare Register B Low Byte 112 (0x89) OCR1AH Timer/Counter1 – Output Compare Register A High Byte 112 (0x88) OCR1AL Timer/Counter1 – Output Compare Register A Low Byte 112 (0x87) ICR1H Timer/Counter1 – Input Capture Register High Byte 112 (0x86) ICR1L Timer/Counter1 – Input Capture Register Low Byte 112 (0x85) TCNT1H Timer/Counter1 – Counter Register High Byte 111 (0x84) TCNT1L Timer/Counter1 – Counter Register Low Byte 111 (0x83) Reserved – – – – – – – – (0x82) TCCR1C FOC1A FOC1B – – – – – –111 (0x81) TCCR1B ICNC1 ICES1 – WGM13 WGM12 CS12 CS11 CS10 110 (0x80) TCCR1A COM1A1 COM1A0 COM1B1 COM1B0 – –WGM11 WGM10 108 (0x7F) DIDR1 – – – – – – AIN1D AIN0D 160 (0x7E) DIDR0 ADC7D ADC6D ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D 177 (0x7D) Reserved – – – – – – – – Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page |
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