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L6563STR Datasheet(PDF) 31 Page - STMicroelectronics

Part No. L6563STR
Description  Enhanced transition-mode PFC controller
Download  42 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6563STR Datasheet(HTML) 31 Page - STMicroelectronics

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L6563S
Application information
Doc ID 16116 Rev 3
31/42
6.7
Power management/housekeeping functions
A special feature of this IC is that it facilitates the implementation of the “housekeeping”
circuitry needed to co-ordinate the operation of the PFC stage to that of the cascaded DC-
DC converter. The functions realized by the housekeeping circuitry ensure that transient
conditions like power-up or power down sequencing or failures of either power stage be
properly handled.
This device provides some pins to do that. One communication line between the IC and the
PWM controller of the cascaded dc-dc converter is the pin PWM_LATCH (Figure 44b),
which is normally open (high impedance) when the PFC works properly, and goes high if it
loses control of the output voltage (because of a feedback loop disconnection) with the aim
of latching off the PWM controller of the cascaded dc-dc converter as well (see “Feedback
failure protection” section for more details).
A second communication line can be established via the disable function included in the
PFC_OK pin (see “Feedback failure protection” section for more details). Typically this line is
used to allow the PWM controller of the cascaded dc-dc converter to drive in burst mode
operation the L6563S in case of light load and to minimize the no-load input consumption.
Interface circuits like those are shown in Figure 43.
Figure 43.
Interface circuits that let dc-dc converter's controller IC drive L6563S in
burst mode
The third communication line is the pin PWM_STOP (#9), which works in conjunction with
the pin RUN (#10). The purpose of the PWM_STOP pin is to inhibit the PWM activity of both
the PFC stage and the cascaded dc-dc converter. The pin is an open collector, normally
open, that goes low if the device is disabled by a voltage lower than 0.8 V on the RUN pin. It
is important to point out that this function works correctly in systems where the PFC stage is
the master and the cascaded dc-dc converter is the slave or, in other words, where the PFC
stage starts first, powers both controllers and enables/disables the operation of the dc-dc
stage. The pin RUN can be used to start and stop the main converter. In the simplest case,
to enable/disable the PWM controller the pin PWM_STOP can be connected to the output of
the error amplifier (Figure 44a).


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