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LPC1313FHN33 Datasheet(PDF) 47 Page - NXP Semiconductors |
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LPC1313FHN33 Datasheet(HTML) 47 Page - NXP Semiconductors |
47 / 60 page LPC1311_13_42_43_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 6 May 2010 47 of 60 NXP Semiconductors LPC1311/13/42/43 32-bit ARM Cortex-M3 microcontroller Fig 24. SSP slave timing in SPI mode SCK (CPOL = 0) MOSI MISO Tcy(clk) tclk(H) tclk(L) tDS tDH tv(Q) DATA VALID DATA VALID th(Q) SCK (CPOL = 1) DATA VALID DATA VALID MOSI MISO tDS tDH tv(Q) DATA VALID DATA VALID th(Q) DATA VALID DATA VALID CPHA = 1 CPHA = 0 002aae830 |
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