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LH75401N0Q100C0 Datasheet(PDF) 3 Page - NXP Semiconductors |
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LH75401N0Q100C0 Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 63 page  System-on-Chip LH75401/LH75411 Preliminary data sheet Rev. 01 — 16 July 2007 3 NXP Semiconductors LH75401 BLOCK DIAGRAM Figure 1. LH75401 Block Diagram LH75401-1 OSCILLATOR, PLL, POWER MANAGEMENT, and RESET CONTROL VECTORED INTERRUPT CONTROLLER INTERNAL 16KB SRAM TCM 16KB SRAM AHB INTERFACE BROWNOUT DETECTOR LINEAR REGULATOR 14 to 20 MHz 32.768 kHz REAL TIME CLOCK COLOR LCD CONTROLLER STATIC MEMORY CONTROLLER ARM7TDMI-S ADVANCED PERIPHERAL BUS BRIDGE 4 CHANNEL DMA CONTROLLER ADVANCED HIGH PERFORMANCE BUS (AHB) ADVANCED PERPHERAL BUS (APB) ADVANCED LCD INTERFACE 76-BIT GENERAL PURPOSE I/O I/O CONFIGURATION SYNCHRONOUS SERIAL PORT TIMER (3) WATCHDOG TIMER CAN 2.0B 8 CHANNEL 10-BIT ADC TOUCH PANEL INTERFACE UART (3) LH75401 |
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