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TXB0101DBVT Datasheet(PDF) 9 Page - Texas Instruments |
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TXB0101DBVT Datasheet(HTML) 9 Page - Texas Instruments |
9 / 22 page PRINCIPLES OF OPERATION Applications Architecture 4k 4k A B VCCA VCCB One Shot One Shot One Shot One Shot T1 T2 T3 T4 TXB0101 www.ti.com........................................................................................................................................... SCES639A – JANUARY 2007 – REVISED NOVEMBER 2008 The TXB0101 can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. The TXB0101 architecture (see Figure 1) does not require a direction-control signal to control the direction of data flow from A to B or from B to A. In a dc state, the output drivers of the TXB0101 can maintain a high or low, but are designed to be weak, so that they can be overdriven by an external driver when data on the bus starts flowing the opposite direction. The output one shots detect rising or falling edges on the A or B ports. During a rising edge, the one shot turns on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly, during a falling edge, the one shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up the high-to-low transition. The typical output impedance during output transition is 70 Ω at VCCO = 1.2 V to 1.8 V, 50 Ω at VCCO = 1.8 V to 3.3 V, and 40 Ω at VCCO = 3.3 V to 5 V. Figure 1. Architecture of TXB0101 I/O Cell Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TXB0101 |
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