EP7312_05 datasheet(55/64 Pages) CIRRUS

Part #	EP7312

Description	High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced

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Manufacturer	CIRRUS [Cirrus Logic]

Direct Link	http://www.cirrus.com

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55 / 64 page

DS508F1

©Copyright Cirrus Logic, Inc. 2005

55

EP7312

High-Performance, Low-Power System on Chip

8

C2

D2

EXPRDY

I

13

9E2

F4

TXD2

O

14

10

D2

E1

RXD2

I

16

13

F3

E2

PB[7]

I/O

17

14

D1

G5

PB[6]

I/O

20

15

F2

F1

PB[5]

I/O

23

16

E1

G4

PB[4]

I/O

26

17

F1

F2

PB[3]

I/O

29

18

G2

H7

PB[2]

I/O

32

19

G1

PB[1]

I/O

35

20

H3

H6

PB[0]

I/O

38

23

H1

PA[7]

I/O

41

24

J3

H5

PA[6]

I/O

44

25

J2

H2

PA[5]

I/O

47

26

J1

H4

PA[4]

I/O

50

27

L3

J1

PA[3]

I/O

53

28

K2

J4

PA[2]

I/O

56

29

K1

J2

PA[1]

I/O

59

30

M3

J5

PA[0]

I/O

62

31

L2

K1

LEDDRV

O

65

32

L1

J6

TXD1

O

67

34

N3

K2

PHDIN

I

69

35

M2

J7

CTS

I

70

36

M1

L1

RXD1

I

71

37

P3

K4

DCD

I

72

38

N1

L2

DSR

I

73

39

N2

K5

nTEST1

I

74

40

R3

M1

nTEST0

I

75

41

P1

K6

EINT3

I

76

42

P2

M2

nEINT2

I

77

43

T3

L4

nEINT1

I

78

44

R1

N1

nEXTFIQ

I

79

45

R2

L5

PE[2]/CLKSEL

I/O

80

46

T1

N2

PE[1]/

BOOTSEL[1]

I/O

83

47

T2

M4

PE[0]/BOOTSEL0

I/O

86

53

V4

T2

PD[7]/SDQM[1]

I/O

89

54

W4

T3

PD[6/SDQM[0]]

I/O

92

55

Y4

N5

PD[5]

I/O

95

Table 23. JTAG Boundary Scan Signal Ordering (Continued)

LQFP

Pin No.

TFBGA

Ball

PBGA

Ball

Signal

Type

Position

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EP7312 Datasheet(PDF) 55 Page - Cirrus Logic

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