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ADC1215S Datasheet(PDF) 39 Page - NXP Semiconductors

Part No. ADC1215S
Description  Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs
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Maker  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
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ADC1215S Datasheet(HTML) 39 Page - NXP Semiconductors

 
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NXP Semiconductors
ADC1215S series
ADC1215S series; input buffer; CMOS or LVDS DDR digital output
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 April 2010
Document identifier: ADC1215S_SER_1
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
16. Contents
1
General description . . . . . . . . . . . . . . . . . . . . . . 1
2
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
5
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
6.1
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8
Thermal characteristics . . . . . . . . . . . . . . . . . . 6
9
Static characteristics . . . . . . . . . . . . . . . . . . . . . 7
10
Dynamic characteristics . . . . . . . . . . . . . . . . . 10
10.1
Dynamic characteristics . . . . . . . . . . . . . . . . . 10
10.2
Clock and digital output timing . . . . . . . . . . . . 12
10.3
SPI timings . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
11
Application information. . . . . . . . . . . . . . . . . . 16
11.1
Device control . . . . . . . . . . . . . . . . . . . . . . . . . 16
11.1.1
SPI and Pin control modes . . . . . . . . . . . . . . . 16
11.1.2
Operating mode selection. . . . . . . . . . . . . . . . 16
11.1.3
Selecting the output data standard . . . . . . . . . 16
11.1.4
Selecting the output data format. . . . . . . . . . . 17
11.2
Analog inputs . . . . . . . . . . . . . . . . . . . . . . . . . 17
11.2.1
Input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
11.2.2
Transformer . . . . . . . . . . . . . . . . . . . . . . . . . . 18
11.3
System reference and power management . . 19
11.3.1
Internal/external references . . . . . . . . . . . . . . 19
11.3.2
Reference gain control . . . . . . . . . . . . . . . . . . 20
11.3.3
Common-mode output voltage (VO(cm)) . . . . . 20
11.3.4
Biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
11.4
Clock input . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
11.4.1
Drive modes . . . . . . . . . . . . . . . . . . . . . . . . . 21
11.4.2
Equivalent input circuit . . . . . . . . . . . . . . . . . . 22
11.4.3
Duty cycle stabilizer . . . . . . . . . . . . . . . . . . . . 22
11.4.4
Clock input divider . . . . . . . . . . . . . . . . . . . . . 22
11.5
Digital outputs . . . . . . . . . . . . . . . . . . . . . . . . . 23
11.5.1
Digital output buffers: CMOS mode . . . . . . . . 23
11.5.2
Digital output buffers: LVDS DDR mode . . . . . 24
11.5.3
Data valid (DAV) output clock . . . . . . . . . . . . . 25
11.5.4
Out-of-Range (OTR) . . . . . . . . . . . . . . . . . . . . 25
11.5.5
Digital offset . . . . . . . . . . . . . . . . . . . . . . . . . . 25
11.5.6
Test patterns . . . . . . . . . . . . . . . . . . . . . . . . . . 25
11.5.7
Output codes versus input voltage . . . . . . . . . 26
11.6
Serial Peripheral Interface (SPI) . . . . . . . . . . . 26
11.6.1
Register description . . . . . . . . . . . . . . . . . . . . 26
11.6.2
Default modes at start-up . . . . . . . . . . . . . . . . 27
11.6.3
Register allocation map . . . . . . . . . . . . . . . . . 29
12
Package outline. . . . . . . . . . . . . . . . . . . . . . . . 35
13
Revision history . . . . . . . . . . . . . . . . . . . . . . . 36
14
Legal information . . . . . . . . . . . . . . . . . . . . . . 37
14.1
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 37
14.2
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
14.3
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 37
14.4
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 38
15
Contact information . . . . . . . . . . . . . . . . . . . . 38
16
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39


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