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ADC1215S Datasheet(PDF) 34 Page - NXP Semiconductors

Part No. ADC1215S
Description  Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs
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Maker  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
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ADC1215S Datasheet(HTML) 34 Page - NXP Semiconductors

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ADC1215S_SER_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Preliminary data sheet
Rev. 01 — 12 April 2010
34 of 39
NXP Semiconductors
ADC1215S series
ADC1215S series; input buffer; CMOS or LVDS DDR digital output
Table 31.
LVDS DDR output register 1 (address 0021h) bit description
Bit
Symbol
Access
Value
Description
7 to 6
-
00
not used
5
DAVI_x2_EN
R/W
double LVDS current for DAV LVDS buffer
0
disabled
1
enabled
4 to 3
DAVI[1:0]
R/W
LVDS current for DAV LVDS buffer
00
3.5 mA
01
4.5 mA
10
1.25 mA
11
2.5 mA
2
DATAI_x2_EN
R/W
double LVDS current for DATA LVDS buffer
0
disabled
1
enabled
1 to 0
DATAI[1:0]
R/W
LVDS current for DATA LVDS buffer
00
3.5 mA
01
4.5 mA
10
1.25 mA
11
2.5 mA
Table 32.
LVDS DDR output register 2 (address 0022h) bit description
Bit
Symbol
Access
Value
Description
7 to 4
-
0000
not used
3
BIT/BYTE_WISE
R/W
DDR mode for LVDS output
0
bit wise (even data bits output on DAV rising edge / odd data bits
output on DAV falling edge)
1
byte wise (MSB data bits output on DAV rising edge / LSB data
bits output on DAV falling edge)
2 to 0
LVDS_INTTER[2:0]
R/W
internal termination for LVDS buffer (DAV and DATA)
000
no internal termination
001
300
Ω
010
180
Ω
011
110
Ω
100
150
Ω
101
100
Ω
110
81
Ω
111
60
Ω


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