ADC1004S030TS datasheet(10/19 Pages) NXP

Part #	ADC1004S030TS

Description	Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz

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Manufacturer	NXP [NXP Semiconductors]

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10 / 19 page

ADC1004S030_040_050_3

Product data sheet

Rev. 03 — 7 August 2008

10 of 19

NXP Semiconductors

ADC1004S030/040/050

Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz

[7]

Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8000 acquisition points per equivalent fundamental

period. The calculation takes into account all harmonics and noise up to half of the clock frequency (Nyquist frequency). Conversion to

signal-to-noise ratio: SINAD = ENOB

× 6.02 + 1.76 dB.

[8]

Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two input signals have

the same amplitude and the total amplitude of both signals provides full-scale to the converter.

[9]

Measurement carried out using video analyzer VM700A, where the video analog signal is reconstructed through a digital-to-analog

converter.

[10] Output data acquisition: the output data is available after the maximum delay time of td(max). For 50 MHz version NXP Semicocnductors

recommends the lowest possible output load.

11. Additional information relating to Table 6

Fig 3.

Explanation of Table 6, Table note 3

014aaa325

RT

RB

RM

Rlad

ROT

RL

IL

ROB

code 1023

code 0

Table 7.

Output coding and input voltage (typical values; referenced to AGND, VRB = 1.3 V,

VRT = 3.67 V)

Code

Vi(a)(p-p)

(V)

IR

Binary outputs D9 to D0

Two’s complement

outputs D9 to D0

Underﬂow

< 1.475

0

00 0000 0000

10 0000 0000

0

1.475

1

00 0000 0000

10 0000 0000

1

-

1

00 0000 0001

10 0000 0001

↓

-

↓↓

↓

1022

-

1

11 1111 1110

01 1111 1110

1023

3.495

1

11 1111 1111

01 1111 1111

Overﬂow

> 3.495

0

11 1111 1111

01 1111 1111

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