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ADC1005S060 Datasheet(PDF) 7 Page - NXP Semiconductors

Part No. ADC1005S060
Description  Single 10 bits ADC, up to 60 MHz
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Maker  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
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ADC1005S060 Datasheet(HTML) 7 Page - NXP Semiconductors

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ADC1005S060_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 13 August 2008
7 of 19
NXP Semiconductors
ADC1005S060
Single 10 bits ADC, up to 60 MHz
IIH
HIGH-level input
current
VI = VRT = 3.7 V
-
55
-
µA
Yi
input admittance
fi = 5 MHz
[2]
Ri, input resistance
-
45
-
k
Ci, input capacitance
357pF
Reference voltages for the resistor ladder; see Table 7
VRB
voltage on pin RB
1.2
1.3
2.2
V
VRT
voltage on pin RT
3.4
3.7
VCCA − 0.8
V
Vref(dif)
differential
reference voltage
VRT − VRB
2.2
2.4
3.2
V
Iref
reference current
Vref(dif) = 2.4 V
-
17.6
-
mA
Rlad
ladder resistance
-
136
-
TCRlad
ladder resistor
temperature
coefficient
-
253
-
m
Ω/K
Voffset
offset voltage
Vref(dif) = 2.4 V
BOTTOM
[3] -
200
-
mV
TOP
[3] -
190
-
mV
Vi(a)(p-p)
peak-to-peak
analog input
voltage
Vref(dif) = 2.4 V
[4] 1.95
2.01
2.10
V
Outputs
Digital outputs D9 to D0 and IR (Referenced to OGND)
VOL
LOW-level output
voltage
IO = 1 mA
0
-
0.5
V
VOH
HIGH-level output
voltage
IO = −1mA
VCCO − 0.5
-
VCCO
V
IOZ
OFF-state output
current
0.5 V < VO <VCCO
−20
-
+20
µA
Switching characteristics; Clock input CLK; see Figure 4[1]
fclk(max)
maximum clock
frequency
60
-
-
MHz
tw(clk)H
HIGH clock pulse
width
Tamb = 25 °C
7.0
-
-
ns
tw(clk)L
LOW clock pulse
width
Tamb = 25 °C
3.5
-
-
ns
Analog signal processing; fclk = 60 MHz
Linearity
INL
integral
non-linearity
ramp input
-
±0.8
±2.0
LSB
DNL
differential
non-linearity
ramp input
-
±0.35
±0.9
LSB
Table 6.
Characteristics …continued
VCCA = 4.75 V to 5.25 V; VCCD = 4.75 V to 5.25 V; AGND and DGND shorted together; Tamb =0 °Cto70 °C; typical values
measured at VCCA = VCCD = 5 V; VCCO = 3.3 V; VRB = 1.3 V; VRT = 3.7 V; CL = 10 pF and Tamb =25 °C unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit


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