74LVTH16374ABQ datasheet(9/19 Pages) NXP

Part #	74LVTH16374ABQ

Description	3.3 V 16-bit edge-triggered D-type flip-flop; 3-state

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74LVT_LVTH16374A_7

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Product data sheet

Rev. 07 — 22 March 2010

9 of 19

NXP Semiconductors

74LVT16374A; 74LVTH16374A

3.3 V 16-bit edge-triggered D-type flip-flop; 3-state

[1]

All typical values are at VCC = 3.3 V and Tamb = 25 °C.

[2]

tsu is the same as tsu(H) and tsu(L).

[3]

th is the same as th(H) and th(L).

[4]

tW is the same as tW(H) and tW(L).

11. Waveforms

tsu

set-up time

nDn to nCP; HIGH or LOW; see Figure 9

[2]

VCC = 3.3 V ± 0.3 V

2.0

0.7

-

ns

VCC = 2.7 V

2.0

-

ns

th

hold time

nDn to nCP; HIGH or LOW; see Figure 9

[3]

VCC = 3.3 V ± 0.3 V

0.8

0

-

ns

VCC = 2.7 V

0.1

-

ns

tW

pulse width

nCP HIGH; see Figure 7

[4]

VCC = 3.3 V ± 0.3 V

1.5

0.6

-

ns

VCC = 2.7 V

1.5

-

ns

nCP LOW; see Figure 7

VCC = 3.3 V ± 0.3 V

3.0

1.6

-

ns

VCC = 2.7 V

3.0

-

ns

Table 7.

Dynamic characteristics …continued

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 7.

Propagation delay clock input to output, clock pulse width and maximum clock frequency

001aaa256

nCP input

nQn output

tPHL

tPLH

tW

VOH

VI

GND

VOL

VM

1/fmax

Table 8.

Measurement points

Input

Output

VM

VX

VY

1.5 V

VOL + 0.3 V

VOH − 0.3 V

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