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74LVC2G02GM Datasheet(PDF) 7 Page - NXP Semiconductors

Part # 74LVC2G02GM
Description  Dual 2-input NOR gate
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

74LVC2G02GM Datasheet(HTML) 7 Page - NXP Semiconductors

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74LVC2G02_7
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 6 June 2008
7 of 16
NXP Semiconductors
74LVC2G02
Dual 2-input NOR gate
11. Dynamic characteristics
[1]
Typical values are measured at nominal VCC and at Tamb =25 °C.
[2]
tpd is the same as tPLH and tPHL.
[3]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(C
L × VCC
2
× f
o) = sum of outputs.
12. Waveforms
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
tpd
propagation delay
nA, nB to nY; see Figure 8
[2]
VCC = 1.65 V to 1.95 V
1.2
3.8
8.9
1.2
11.2
ns
VCC = 2.3 V to 2.7 V
0.8
2.4
5.4
0.8
6.8
ns
VCC = 2.7 V
0.8
3.2
6.0
0.8
7.5
ns
VCC = 3.0 V to 3.6 V
0.6
2.4
4.9
0.6
6.2
ns
VCC = 4.5 V to 5.5 V
0.6
1.8
4.3
0.6
5.5
ns
CPD
power dissipation
capacitance
per gate; VI = GND to VCC
[3]
-14
-
-
-
pF
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8.
Input (nA, nB) to output (nY) propagation delays
001aae972
nA, nB input
nY output
tPLH
tPHL
GND
VI
VM
VM
VOH
VOL


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