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TPS54418

SLVS946A – MAY 2009 – REVISED MAY 2010

www.ti.com

TYPICAL CHARACTERISTICS CURVES (continued)

PWRGD ON RESISTANCE vs TEMPERATURE

Figure 21.

OVERVIEW

The TPS54418 is a 6-V, 4-A, synchronous step-down (buck) converter with two integrated n-channel MOSFETs.

To improve performance during line and load transients the device implements a constant frequency, peak

current mode control which reduces output capacitance and simplifies external frequency compensation design.

The wide switching frequency of 200 kHz to 2000 kHz allows for efficiency and size optimization when selecting

the output filter components. The switching frequency is adjusted using a resistor to ground on the RT/CLK pin.

The device has an internal phase lock loop (PLL) on the RT/CLK pin that is used to synchronize the power

switch turn on to a falling edge of an external system clock.

The TPS54418 has a typical default start up voltage of 2.6 V. The EN pin has an internal pull-up current source

that can be used to adjust the input voltage under voltage lockout (UVLO) with two external resistors. In addition,

the pull up current provides a default condition when the EN pin is floating for the device to operate. The total

operating current for the TPS54418 is 350 mA when not switching and under no load. When the device is

disabled, the supply current is less than 5 mA.

The integrated 30 m

Ω MOSFETs allow for high efficiency power supply designs with continuous output currents

up to 4 amperes.

The TPS54418 reduces the external component count by integrating the boot recharge diode. The bias voltage

for the integrated high side MOSFET is supplied by a capacitor on the BOOT to PH pin. The boot capacitor

voltage is monitored by an UVLO circuit and turns off the high side MOSFET when the voltage falls below a

preset threshold. This BOOT circuit allows the TPS54418 to operate approaching 100%. The output voltage can

be stepped down to as low as the 0.8 V reference.

The TPS54418 has a power good comparator (PWRGD) with 2% hysteresis.

The TPS54418 minimizes excessive output overvoltage transients by taking advantage of the overvoltage power

good comparator. When the regulated output voltage is greater than 109% of the nominal voltage, the

overvoltage comparator is activated, and the high side MOSFET is turned off and masked from turning on until

the output voltage is lower than 105%.

The SS (slow start) pin is used to minimize inrush currents or provide power supply sequencing during power up.

A small value capacitor should be coupled to the pin for slow start. The SS pin is discharged before the output

power up to ensure a repeatable restart after an over-temperature fault, UVLO fault or disabled condition.

The use of a frequency foldback circuit reduces the switching frequency during startup and over current fault

conditions to help limit the inductor current.

10

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