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74HCT253N Datasheet(PDF) 1 Page - NXP Semiconductors |
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74HCT253N Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 17 page 1. General description The 74HC253; 74HCT253 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC253; 74HCT253 provides a dual 4-input multiplexer with 3-state outputs which selects 2 bits of data from up to four sources selected by common data select inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW output enable inputs (1OE, 2OE). The 74HC253 and 74HCT253 are the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels applied to S0 and S1. The outputs are forced to a high-impedance OFF-state when nOE is HIGH. The logic equations for the outputs are: 2. Features and benefits Non-inverting data path 3-state outputs interface directly with system bus Complies with JEDEC standard no. 7A Common select inputs Separate output enable inputs Input levels: For 74HC253: CMOS level For 74HCT253: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from −40 °Cto+85 °C and from −40 °Cto+125 °C 74HC253; 74HCT253 Dual 4-input multiplexer; 3-state Rev. 03 — 22 April 2010 Product data sheet 1Y 1OE 1I0 S1 • S0 • 1I1 S1 • S0 • 1I2 + S1 • S0 • 1I3 S1 • S0 • ++ () • = 2Y 2OE 2I0 S1 • S0 • 2I1 S1 • S0 • 2I2 + S1 • S0 • 2I3 S1 • S0 • ++ () • = |
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