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74AUP2G79GD Datasheet(PDF) 2 Page - NXP Semiconductors |
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74AUP2G79GD Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 21 page 74AUP2G79_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 30 June 2009 2 of 21 NXP Semiconductors 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP2G79DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AUP2G79GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74AUP2G79GD −40 °C to +125 °C XSON8U plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 3 × 2 × 0.5 mm SOT996-2 74AUP2G79GM −40 °C to +125 °C XQFN8U plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 2. Marking codes Type number Marking code[1] 74AUP2G79DC p79 74AUP2G79GT p79 74AUP2G79GD p79 74AUP2G79GM p79 Fig 1. Logic symbol Fig 2. IEC logic symbol 001aah811 1D 1CP 2D 2CP 1Q 2Q 001aah812 D CP D CP |
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