74ABT16821A datasheet(7/16 Pages) NXP

Part #	74ABT16821A

Description	20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state

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74ABT16821A_3

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Product data sheet

Rev. 03 — 16 March 2010

7 of 16

NXP Semiconductors

74ABT16821A

20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state

9.

Static characteristics

[1]

For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.

[2]

This parameter is valid for any VCC between 0 V and 2.1 V, with a transition time of up to 10 ms. From VCC = 2.1 V to VCC = 5 V ± 10 %

a transition time of up to 100

μs is permitted.

[3]

Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

[4]

This is the increase in supply current for each input at 3.4 V.

Table 6.

Static characteristics

Symbol

Parameter

Conditions

25

°C

−40 °C to +85 °C Unit

Min

Typ

Max

Min

Max

VIK

input clamping voltage VCC = 4.5 V; IIK = −18 mA

−1.2

−0.9

-

−1.2

-

V

VOH

HIGH-level output

voltage

VI = VIL or VIH

VCC = 4.5 V; IOH = −3 mA

2.5

2.9

-

2.5

-

V

VCC = 5.0 V; IOH = −3 mA

3.0

3.4

-

3.0

-

V

VCC = 4.5 V; IOH = −32 mA

2.0

2.4

-

2.0

-

V

VOL

LOW-level output

voltage

VCC = 4.5 V; IOL =64mA;

VI =VIL or VIH

-

0.36

0.55

-

0.55

V

VOL(pu)

power-up LOW-level

output voltage

VCC = 5.5 V; IO =1mA;

VI =GND or VCC

[1]

-

0.13

0.55

-

0.55

V

II

input leakage current

VCC =5.5 V; VI =VCC or GND

-

±0.01 ±1.0

-

±1.0

μA

IOFF

power-off leakage

current

VCC = 0 V; VI or VO ≤ 4.5 V

-

±5.0 ±100

-

±100

μA

IO(pu/pd)

power-up/power-down

output current

VCC = 2.1 V; VO =0.5 V;

VI =GND or VCC; nOE don’t care

[2]

-

±5.0

±50

-

±50

μA

IOZ

OFF-state output

current

VCC = 5.5 V; VI = VIL or VIH

output HIGH-state at VO = 2.7 V

-

1.0

10

-

10

μA

output LOW-state at VO = 0.5 V

-

−1.0

−10

-

−10

μA

ILO

output leakage current HIGH-state; VO =5.5 V;

VCC =5.5 V; VI =GND or VCC

-5.0

50

-

50

μA

IO

output current

VCC = 5.5 V; VO = 2.5 V

[3]

−180

−90

−50

−180

−50

mA

ICC

supply current

VCC = 5.5 V; VI = GND or VCC

outputs HIGH-state

-

0.5

1.0

-

1.0

mA

outputs LOW-state

-

10

19

-

19

mA

outputs 3-state

-

0.5

1.0

-

1.0

mA

ΔI

CC

additional supply

current

per input pin; VCC = 5.5 V; one input

at 3.4 V and other inputs at VCC or

GND

[4]

-

0.25

1.5

-

1.5

mA

CI

input capacitance

VI =0V or VCC

-3-

-

CO

output capacitance

outputs disabled; VO =0 V or VCC

-7-

-

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