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X25168V14-2.7 Datasheet(PDF) 2 Page - Xicor Inc. |
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X25168V14-2.7 Datasheet(HTML) 2 Page - Xicor Inc. |
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2 / 16 page  X25648/49, X25328/29, X25168/69 2 PIN DESCRIPTIONS Serial Output (SO) SO is a push/pull serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. Serial Input (SI) SI is a serial data input pin. All opcodes, byte addresses, and data to be written to the memory are input on this pin. Data is latched by the rising edge of the serial clock. Serial Clock (SCK) The Serial Clock controls the serial bus timing for data input and output. Opcodes, addresses, or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin change after the falling edge of the clock input. Chip Select (CS) When CS is HIGH, the device is deselected and the SO output pin is at high impedance and unless a nonvolatile write cycle is underway, the device will be in the standby power mode. CS LOW enables the device, placing it in the active power mode. It should be noted that after power-up, a HIGH to LOW transition on CS is required prior to the start of any operation. Write Protect (WP) When WP is low and the nonvolatile bit WPEN is “1”, nonvolatile writes to the device Status Register are disabled, but the part otherwise functions normally. When WP is held high, all functions, including nonvolatile writes to the Status Register operate normally. If an internal Status Register Write Cycle has already been initiated, WP going low while WPEN is a “1” will have no effect on this write. Subsequent write attempts to the Status Register under these conditions will be disabled. The WP pin function is blocked when the WPEN bit in the Status Register is “0”. This allows the user to install the device in a system with WP pin grounded and still be able to program the Status Register. The WP pin functions will be enabled when the WPEN bit is set to a “1”. Reset (RESET/RESET) RESET/RESET is an active LOW/HIGH, open drain out- put which goes active whenever Vcc falls below the mini- mum Vcc sense level. It will remain active until Vcc rises above the minimum Vcc sense level for 200ms. PIN CONFIGURATION PIN NAMES 7036 FRM T01 Symbol Description CS Chip Select Input SO Serial Output SI Serial Input SCK Serial Clock Input WP Program Protect Input VSS Ground VCC Supply Voltage RESET/RESET Reset Output 14-LEAD SOIC X25648/49 NC CS CS SO WP VSS 1 2 3 4 5 6 7 RESET/RESET SCK SI NC 14 13 12 11 10 9 8 NC VCC VCC NC 7036 FRM 02 8-LEAD SOIC X25328/29 CS WP SO 1 2 3 4 RESET/RESET 8 7 6 5 VCC 14-LEAD TSSOP X25328/29 SO WP VSS 1 2 3 4 5 6 7 RESET/RESET SCK SI 14 13 12 11 10 9 8 NC VCC NC X25168/69 VSS SCK SI CS NC NC NC NC X25168/69 |
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