©Xicor, 1995, 1996 Patents Pending

7053 8/13/97 T0/C0/D0 SH

1

Characteristics subject to change without notice

4 Megabit Puma Module

XM28C040P

512K x 8 Bit

High Density 5 Volt Byte Alterable Nonvolatile Memory Array

FEATURES

• High Density Memory Module

—150ns, 200ns, and 250ns Access Times

Available

—4 Megabit Memory in 1 square inch.

• Flexible Multiplane Architecture

—Four Separate Chip Selects

—32 Separate I/Os

• User Configurable I/Os—x8, x16, or x32

• User Configurable Page Size—64 Double-

words, 128 Words, or 256 Bytes

—Concurrent Read/Write Operations

• Able to Continue Reading During a

Nonvolatile Write Cycle.

• 5 Volt Byte or Page Alterable

—No Erase Before Write

• Software Data Protection

• Early End of Write Polling

—DATA Polling

—Toggle Bit Polling

• High Reliability

—Endurance: 100,000 Cycles

—Data Retention: 100 Years

DESCRIPTION

The XM28C040P is a high density CMOS byte alter-

able nonvolatile memory array constructed on a co-

fired ceramic substrate using Xicor’s 128K x 8 compo-

nents in 32-pad leadless chip carriers. The Substrate is

a 66-pin ceramic pin grid array.

The module is configured with four separate chip

enable and write enable inputs and 32 separate I/Os.

This, along with the small footprint, provides the end

user with a large degree of flexibility in board layout and

memory configuration. In addition, with the large num-

ber of pins and the growth path being implemented, the

module will be able to grow to 16 megabits.

FUNCTIONAL DIAGRAM

128K x 8

128K x 8

128K x 8

128K x 8

OE WE1CE1WE2CE2WE3CE3WE4CE4

A0-A16 I/O0-I/O7

I/O8-I/O15

I/O16-I/O23

I/O24-I/O31