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X86C64SM Datasheet(PDF) 9 Page - Xicor Inc. |
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X86C64SM Datasheet(HTML) 9 Page - Xicor Inc. |
9 / 12 page X86C64 9 DS Controlled Write Cycle Symbol Parameter Min. Max. Units PWASH Address Strobe Pulse Width 80 ns tAS Address Setup Time 20 ns tAH Address Hold Time 30 ns tDSW Data Setup Time 50 ns tDHW Data Hold Time 30 ns tCS CE Setup Time 7 ns PWDSH DS Pulse Width 120 ns tWC Write Cycle Time 5 ms tDSS Enable Setup Time 30 ns tRWS R/ W Setup Time 20 ns tDSH DS Hold Time 20 ns tBLC Byte Load Time (Page Write) 0.5 100 µs 3819 PGM T10 DS Controlled Write Cycle 3819 FHD F06 Note: (4) tWC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device requires to automatically complete the internal write operation. AS A/D0–A/D7 A8–A12 R/W AIN DIN PWASH CE tCS tAS tAH A8–A12 tDSS tDSW tDHW PWDSH tRWS tDSH tDSH tDSH DS |
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