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X24F016VE Datasheet(PDF) 1 Page - Xicor Inc. |
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X24F016VE Datasheet(HTML) 1 Page - Xicor Inc. |
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1 / 18 page  SerialFlashTM Memory with Block LockTM Protection 64K/32K/16K 8K/4K/2K x 8 Bit ©Xicor, 1995, 1996 Patents Pending 6686-3.8 8/29/96 T3/C0/D0 SH 1 Characteristics subject to change without notice X24F064/032/016 FUNCTIONAL DIAGRAM FEATURES • 1.8V to 3.6V or 5V “Univolt” Read and Program Power Supply Versions • Low Power CMOS —Active Read Current Less Than 1mA —Active Program Current Less Than 3mA —Standby Current Less Than 1 µA • Internally Organized 8K/4K/2K x 8 • New Programmable Block Lock Protection —Software Write Protection —Programmable hardware Write Protect • Block Lock (0, 1/4, 1/2, or all of the Flash Memory array) • 2 Wire Serial Interface • Bidirectional Data Transfer Protocol • 32 Byte Sector Programming • Self Timed Program Cycle —Typical Programming Time of 5ms Per Sector • High Reliability —Endurance: 100,000 cycles per byte —Data Retention: 100 Years • Available Packages —8-Lead PDIP —8-Lead SOIC (JEDEC) —14-Lead TSSOP (X24F032/016) —20-Lead TSSOP (X24F064) DESCRIPTION The X24F064/032/016 is a CMOS SerialFlash Memory Family, internally organized 8K/4K/2K x 8. The family features a serial interface and software protocol allowing operation on a simple two wire bus. Device select inputs (S0, S1, S2) allow up to eight devices to share a common two wire bus. A Program Protect Register accessed at the highest address location, provides three new programming protection features: Software Programming Protection, Block Lock Protection, and Hardware Programming Protection. The Software Programming Protection feature prevents any nonvolatile writes to the device until the WEL bit in the program protect register is set. The Block LockTM Protection feature allows the user to individually protect four blocks of the array by program- ming two bits in the programming protect register. The Programmable Hardware Program Protect feature allows the user to install each device with PP tied to VCC, program the entire memory array in place, and then enable the hardware programming protection by programming a PPEN bit in the program protect register. After this, selected blocks of the array, including the program protect register itself, are permanently protected from being programmed. 6686 ILL F01.5 COMMAND DECODE AND CONTROL LOGIC X DECODE LOGIC SECTORED MEMORY ARRAY SDA SCL S2/S2 PROGRAM PROTECT REGISTER PROGRAMMING CONTROL LOGIC PP HIGH VOLTAGE CONTROL SECTOR DECODE LOGIC 32 8 DATA REGISTER S1/S1 S0/S0 SerialFlash™ Memory and Block Lock™ Protection are trademarks of Xicor, Inc. APPLICATION NOTE A V A I L A B L E AN76 • AN78 • AN81 • AN87 |
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