10

X24022

are periodically sampled and not 100% tested.

tSU:STA

tHD:STA

tHD:DAT

tSU:DAT

tLOW

tSU:STO

tR

tBUF

SCL

SDA IN

SDA OUT

tDH

tAA

tF

tHIGH

3848 FHD F04

Bus Timing

POWER-UP TIMING

Symbol

Parameter

Max.

Units

Power-Up to Read Operation

1

ms

Power-Up to Write Operation

5

ms

3848 PGM T09

Read & Write Cycle Limits

Symbol

Parameter

Min.

Max.

Units

SCL Clock Frequency

0

100

KHz

Noise Suppression Time Constant at SCL, SDA Inputs

100

ns

SCL Low to SDA Data Out Valid

0.3

3.5

µs

Time the Bus Must Be Free Before a New Transmission Can Start

4.7

µs

Start Condition Hold Time

4.0

µs

Clock Low Period

4.7

µs

Clock High Period

4.0

µs

Start Condition Setup Time

4.7

µs

Data In Hold Time

0

µs

Data In Setup Time

250

ns

SDA and SCL Rise Time

1

µs

SDA and SCL Fall Time

300

ns

Stop Condition Setup Time

4.7

µs

Data Out Hold Time

300

ns

3848 PGM T08

A.C. CHARACTERISTICS LIMITS (Over recommended operating conditions unless otherwise specified)

A.C. CONDITIONS OF TEST

Input Pulse Levels

Input Rise and

Fall Times

10 ns

Input and Output

Timing Levels

3848 PGM T02

EQUIVALENT A.C. LOAD CIRCUIT

5.0V

1533

Ω

100pF

Output

3848 FHD F18