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X22C12DM Datasheet(PDF) 2 Page - Xicor Inc. |
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X22C12DM Datasheet(HTML) 2 Page - Xicor Inc. |
2 / 12 page X22C12 2 PIN DESCRIPTIONS AND DEVICE OPERATION Addresses (A0–A7) The address inputs select a 4-bit memory location during a read or write operation. Chip Select ( CS) The Chip Select input must be LOW to enable read or write operations with the RAM array. CS HIGH will place the I/O pins in the high impedance state. Write Enable ( WE) The Write Enable input controls the I/O buffers, deter- mining whether a RAM read or write operation is en- abled. When CS is LOW and WE is HIGH, the I/O pins will output data from the selected RAM address loca- tions. When both CS and WE are LOW, data presented at the I/O pins will be written to the selected address location. Data In/Data Out (I/O1–I/O4) Data is written to or read from the X22C12 through the I/O pins. The I/O pins are placed in the high impedance state when either CS is HIGH or during either a store or recall operation. STORE The STORE input, when LOW, will initiate the transfer of the entire contents of the RAM array to the E2PROM array. The WE and RECALL inputs are inhibited during the store cycle. The store operation is completed in 5ms or less. A store operation has priority over RAM read/write operations. If STORE is asserted during a read opera- tion, the read will be discontinued. If STORE is asserted during a RAM write operation, the write will be immedi- ately terminated and the store performed. The data at the RAM address that was being written will be unknown in both the RAM and E2PROM arrays. RECALL The RECALL input, when LOW, will initiate the transfer of the entire contents of the E2PROM array to the RAM array. The transfer of data will be completed in 1 µs or less. An array recall has priority over RAM read/write opera- tions and will terminate both operations when RECALL is asserted. RECALL LOW will also inhibit the STORE input. Automatic Recall Upon power-up the X22C12 will automatically recall data from the E2PROM array into the RAM array. Write Protection The X22C12 has three write protect features that are employed to protect the contents of the nonvolatile memory. •VCC Sense—All functions are inhibited when VCC is <3.5V typical. • Write Inhibit—Holding either STORE HIGH or RECALL LOW during power-up or power-down will prevent an inadvertent store operation and E2PROM data integrity will be maintained. • Noise Protection—A STORE pulse of typically less than 20ns will not initiate a store cycle. PIN NAMES Symbol Description A0–A7 Address Inputs I/O1–I/O4 Data Inputs/Outputs WE Write Enable CS Chip Select RECALL Recall STORE Store VCC +5V VSS Ground NC No Connect 3817 PGM T01 |
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