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A8732 Datasheet(PDF) 15 Page - Allegro MicroSystems |
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A8732 Datasheet(HTML) 15 Page - Allegro MicroSystems |
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15 / 20 page  Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver 15 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A8732 ILIM Programming The peak current limit can be programmed to sixteen differ- ent levels, from 100% to 29%, with programming through the CHARGE pin. An internal digital circuit decodes the input clock signals, which sets the switch current limit. This flexible scheme allows the user to operate the A8732 at required current limits. The battery life can be effectively extended by setting a lower cur- rent limit at low battery voltages. Figure 6 shows the ILIM clock timing scheme protocol. The total ILIM setup time, tILIM(SU), denotes the time needed for the decoder circuit to receive ILIM inputs and set ISWLIM, and has a typical duration of 200 μs. Figure 7 shows the timing definition of the primary current limiting circuit. At the end of the setup period, tILIM(SU), primary current starts to ramp up to the set ISWLIM. The ISWLIM setting remains in effect as long as the CHARGE pin is high. To reset the ILIM decoder, pull the CHARGE pin low before clocking-in the new setting. After the first start-up or an ILIM decoder reset, each new current limit can be set by sending a burst of pulses to the CHARGE pin. The first rising edge starts the ILIM decoder, and up to 16 rising edges will be counted to set the ISWLIM level. The first pulse width, tILIM1(H), must be at least 15 μs long. Subsequent pulses (up to 15 more) can be as short as 0.2 μs. The last low- to-high edge must arrive within 200 μs from the first edge. The CHARGE pin will stay high afterwards. (0 to 15) Figure 6. ILIM programming timing definition Figure 7. Current limit timing example (ISWLIM4 selected) |
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