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WM2608 Datasheet(PDF) 5 Page - Wolfson Microelectronics plc

Part No. WM2608
Description  Octal 10-bit, Serial Input, Voltage Output DAC with Power Down
Download  13 Pages
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Maker  WOLFSON [Wolfson Microelectronics plc]
Homepage  http://www.wolfsonmicro.com
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WM2608 Datasheet(HTML) 5 Page - Wolfson Microelectronics plc

 
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Production Data
WM2608
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 April 2001
5
Test Characteristics:
Over recommended operating conditions (unless noted otherwise).
PARAMETER
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNIT
Digital Inputs
High level input current
IIH
Input voltage = DVDD
1
µA
Low level input current
IIL
Input voltage = 0V
-1
µA
Input capacitance
CI
8pF
Digital Output
High level digital output voltage
VOH
Load = 10k
2.6
V
Low level digital output voltage
VOL
Load = 10k
0.4
V
Output voltage rise time
Load = 10k
Ω, 20pF, includes
propagation delay
720
ns
Notes:
1. Integral non-linearity (INL) is the maximum deviation of the output from the line between zero and full scale excluding
the effects of zero code and full scale errors).
2. Differential non-linearity (DNL) is the difference between the measured and ideal 1LSB amplitude change
of any adjacent two codes. A guarantee of monotonicity means the output voltage changes in the same
direction (or remains constant) as a change in digital input code.
3. Zero code error is the voltage output when the DAC input code is zero.
4. Gain error is the deviation from the ideal full-scale output excluding the effects of zero code error.
5. Power supply rejection ratio is measured by varying AVDD from 4.5V to 5.5V and measuring the
proportion of this signal imposed on the zero code error and the gain error.
6. Zero code error and Gain error temperature coefficients are normalised to full-scale voltage.
7. Output load regulation is the difference between the output voltage at full scale with a 10k
Ω load and 2kΩ
load. It is expressed as a percentage of the full scale output voltage with a 10k
Ω load.
8. IDD is measured while continuously writing code 512 to the DAC. For VIH < DVDD - 0.7V and VIL > 0.7V
supply current will increase.
9. Slew rate results are for the lower value of the rising and falling edge slew rates.
10. Settling time is the time taken for the signal to settle to within 0.5LSB of the final measured value for both rising and
falling edges. Limits are ensured by design and characterisation, but are not production tested.


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