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BR24A Datasheet(PDF) 3 Page - Rohm

Part No. BR24A
Description  High Reliability Series EEPROMs I2C BUS
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Maker  ROHM [Rohm]
Homepage  http://www.rohm.com
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BR24A Datasheet(HTML) 3 Page - Rohm

 
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BR24A□□-WM series
Technical Note
3/17
www.rohm.com
2009.08 - Rev.C
© 2009 ROHM Co., Ltd. All rights reserved.
FAST-MODE and STANDARD-MODE
FAST-MODE and STANDARD-MODE are of same actions, and mode is changed. They are distinguished by action speeds.
100kHz action is called STANDARD-MODE, and 400kHz action is called FAST-MODE. This action frequency is the
maximum action frequency, so 100kHz clock may be used in FAST-MODE. At VCC=2.5V~5.5V , 400kHz, namely, action is
made in FASTMODE. (Action is made also in STANDARD-MODE.)
Sync data input / output timing
Input read at the rise edge of SCL
Data output in sync with the fall of SCL
Fig.1-(a) Sync data input / output timing
Fig.1-(b) Start-stop bit timing
Fig.1-(c) Write cycle timing
Fig.1-(d) WP timing at write execution
At write execution, in the area from the D0 taken clock rise of the first
DATA(1), to tWR, set WP=“LOW”.
By setting WP “HIGH” in the area, write can be cancelled.
When it is set WP=“HIGH” during tWR, write is forcibly ended, and data of
address under access is not guaranteed, therefore write it once again.
Fig.1-(e) WP timing at write cancel
SDA
tSU:STA
tSU:STO
tHD:STA
START BIT
STOP BIT
SCL
tHIGH:WP
WP
SDA
D1
D0
ACK
ACK
DATA(1)
DATA(n)
tWR
SCL
SDA
Write data
(
n-th address)
Stop condition
Start condition
SCL
WR
ACK
D0
SDA
(入力)
SDA
(出力)
tHD:STA
tHD:DAT
tSU:DAT
tBUF
tPD
tDH
tLOW
tHIGH
tR
tF
SCL
(input)
(output)
SCL
SDA
WP
HD:WP
ストップコンディション
WR
D1
D0
ACK
ACK
DATA(1)
DATA(n)
tSU:WP
Stop condition


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