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About heat loss

In designing heat, operate the apparatus within the following conditions.

(Because the following temperatures are warranted temperature, be sure to take margin, etc. into account.)

1. Ambient temperature Ta shall be not more than 100°C.

2. Chip junction temperature Tj shall be not more than 150°C.

Chip junction temperature Tj can be considered under the following two cases.

When multilayer substrates are used, if any GND pattern is present in the inner layer, arrange heat radiation vias on the

package rear side. Because the present package size is as small as 1.0 x 1.6 mm and vias are unable to be arranged in a

large quantity at the lower part of IC, the pattern is expanded as illustrated below and the number of vias is increased to

obtain superb heat radiation characteristics (the figure below is an image figure only, and the size and the quantity of vias

that match the condition must be designed into patterns).

Most of heat loss in BD3507HFV occurs at the output N-channel FET. The power lost is determined by multiplying the

voltage between VIN and Vo by the output current. Confirm the VIN and Vo voltages used and output current conditions,

and check with the thermal derating characteristics. As this IC employs the power PKG, the thermal derating characteristics

significantly depends on the pc board conditions. When designing, care must be taken to the size of a pc board to be used.

Power dissipation (W) = {Input voltage (VIN) – Output voltage (V0≒VREF)}×Io (averaged)

Ex.) If VIN = 1.8 volts, V0=1.2 volts, and Io (averaged)=0.5 A, the power dissipation is given by the following:

Power dissipation (W) =(1.8 volts – 1.2 volts) × 0.5 (A)

= 0.3 W

①

Chip junction temperature Tj is found

from IC surface temperature TC under

actual application conditions:

Tj=TC+θj-c×W

②

Chip junction temperature Tj is found from ambient temperature Ta:

Tj=Ta+θj-a×W

＜

Reference value＞

θ

j-c:HVSOF6 30℃/W

＜

Reference value＞

Single-layer substrate

(substrate surface copper foil area: less 3%)

Single-layer substrate

(substrate surface copper foil area:100mm

Single-layer substrate

(substrate surface copper foil area:900mm

Single-layer substrate

(substrate surface copper foil area:2500mm

Substrate size 70×70×1.6mm

3

θ

j-a:HVSOF6

243.9℃/W

147.1℃/W

89.3℃/W

73.5℃/W