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TRF371135 Datasheet(PDF) 40 Page - Texas Instruments |
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TRF371135 Datasheet(HTML) 40 Page - Texas Instruments |
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40 / 54 page  TRF371135 SLWS220A – FEBRUARY 2010 – REVISED MARCH 2010 www.ti.com Table 2. Register 1 Device Setup (continued) REGISTER 1 NAME RESET VALUE WORKING DESCRIPTION Bit11 NU 1 Not used Bit12 BBGAIN_0 1 Baseband gain setting. Default = 15. Range is from 0 (minimum gain Bit13 BBGAIN_1 1 setting) to 24 (maximum gain setting). See the Application Information Bit14 BBGAIN_2 1 section for more information on gain setting and fast gain control Bit15 BBGAIN_3 1 options. Bit16 BBGAIN_4 0 Bit17 LPFADJ_0 0 Bit18 LPFADJ_1 0 Bit19 LPFADJ_2 0 Sets programmable low-pass filter corner frequency. Range = 255 Bit20 LPFADJ_3 0 (lowest corner frequency) to 0 (highest corner frequency). Default value Bit21 LPFADJ_4 0 is 128. Bit22 LPFADJ_5 0 Bit23 LPFADJ_6 0 Bit24 LPFADJ_7 1 Bit25 EN_FLT_B0 0 Selects dc offset detector filter bandwidth. Setting {00, 01, 11} = {10 MHz, 10 kHz, 1 kHz} Bit26 EN_FLT_B1 0 Bit27 EN_FASTGAIN 0 Enable external fast-gain control Bit28 GAIN_SEL 0 Fast-gain control multiplier bit (×2 = 1) Bit29 OSC_TEST 0 Enables OSC out on readback pin if = 1 Bit30 NU 0 Not used Bit31 EN 3dB Attn 0 Enables output 3-dB attenuator EN_FLT_B0/1: These bits control the bandwidth of the detector used to measure the dc offset during the automatic calibration. There is an RC filter in front of the detector that can be fully bypassed. EN_FLT_B0 controls the resistor (bypass = 1), while EN_FLT_B1 controls the capacitor (bypass = 1). The typical 3-dB cutoff frequencies of the detector bandwidth are summarized in the following table (see the Application Information section for more detail on the dc offset calibration and the detector bandwidth). EN_FLT_B1 EN_FLT_B0 TYPICAL 3-dB CUTOFF FREQ NOTES X 0 10 MHz Maximum bandwidth, bypass R, C 0 1 10 kHz Enable R 1 1 1 kHz Minimum bandwidth, enable R, C Table 3. Register 2 Device Setup REGISTER 2 NAME RESET VALUE WORKING DESCRIPTION Bit0 ADDR<0> 0 Bit1 ADDR<1> 1 Register address Bit2 ADDR<2> 0 Bit3 ADDR<3> 1 SPI bank address Bit4 ADDR<4> 0 Bit5 EN_AUTOCAL 0 Enable autocal when = 1; reset to 0 when done. 40 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TRF371135 |
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