Electronic Components Datasheet Search |
|
P2V28S20ATP-8 Datasheet(PDF) 4 Page - Vanguard International Semiconductor |
|
P2V28S20ATP-8 Datasheet(HTML) 4 Page - Vanguard International Semiconductor |
4 / 51 page JULY.2000 Rev.2.2 128Mb Synchronous DRAM P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT) P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT) P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT) P2 V 28 S 3 0 TP -8 Access Item -7 : 7 ns (143MHz/3-3-3) -75 : 7.5ns (100MHz/2-2-2 or 133MHz/3-3-3) -8 : 8 ns (100MHz/2-2-2 or 125MHz/3-3-3) Package Type TP : TSOP(II) Process Generation Interface V :LVTTL Organization 2 : x4, 3 : x8, 4: x16 Synchronous DRAM Density 128 :128Mbit Function 0 : Random Column PSC DRAM Address Buffer A0-11 BA0,1 Control Signal Buffer /CS /RAS /CAS /WE CLK CKE Clock Buffer Control Circuitry I/O Buffer DQ0-7 Mode Register DQM Memory Array Bank #0 4096 x1024 x8 Cell Array Memory Array Bank #1 Cell Array Memory Array Bank #2 Cell Array Memory Array Bank #3 Cell Array A 4096 x1024 x8 4096 x1024 x8 4096 x1024 x8 Note:This figure shows the P2V28S30ATP The A2V28S20ATP configuration is 4096x2048x4 of cell array and DQ0-3 The A2V28S40ATP configuration is 4069x512x16 of cell array and DQ0-15 A : 2nd generation Page-3 BLOCK DIAGRAM Type Designation Code |
Similar Part No. - P2V28S20ATP-8 |
|
Similar Description - P2V28S20ATP-8 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |