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H5MS1262EFP-K3M Datasheet(PDF) 14 Page - Hynix Semiconductor

Part # H5MS1262EFP-K3M
Description  128M (8Mx16bit) Mobile DDR SDRAM
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

H5MS1262EFP-K3M Datasheet(HTML) 14 Page - Hynix Semiconductor

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Rev 1.1 / July. 2009
14
Mobile DDR SDRAM 128Mbit (8M x 16bit)
H5MS1262EFP Series
CKE TRUTH TABLE
Note:
1. CKEn is the logic state of CKE at clock edge
n; CKEn-1 was the state of CKE at the previous clock edge.
2. Current state is the state of LP DDR immediately prior to clock edge
n.
3. COMMAND
n is the command registered at clock edge n, and ACTIONn is the result of COMMANDn.
4. All states and sequences not shown are illegal or reserved.
5. DESELECT and NOP are functionally interchangeable.
6. Power Down exit time (tXP) should elapse before a command other than NOP or DESELECT is issued.
7. SELF REFRESH exit time (tXSR) should elapse before a command other than NOP or DESELECT is issued.
8. The Deep Power-Down exit procedure must be followed as discussed in the Deep Power-Down section of the Functional Description.
9. The clock must toggle at least one time during the tXP period.
10. The clock must toggle at least once during the tXSR time.
CKEn-1
CKEn
Current State
COMMAND
n
ACTION
n
Note
L
L
Power Down
X
Maintain Power Down
L
L
Self Refresh
X
Maintain Self Refresh
L
L
Deep Power Down
X
Maintain Deep Power
Down
L
H
Power Down
NOP or DESELECT
Exit Power Down
5,6,9
L
H
Self Refresh
NOP or DESELECT
Exit Self Refresh
5,7,10
L
H
Deep Power Down
NOP or DESELECT
Exit Deep Power Down
5,8
H
L
All Banks Idle
NOP or DESELECT
Precharge Power
Down Entry
5
H
L
Bank(s) Active
NOP or DESELECT
Active Power Down
Entry
5
H
L
All Banks Idle
AUTO REFRESH
Self Refresh entry
H
L
All Banks Idle
BURST TERMINATE
Enter Deep Power
Down
H
H
See the other Truth Tables


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