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H5MS1222EFP-Q3M Datasheet(PDF) 31 Page - Hynix Semiconductor

Part # H5MS1222EFP-Q3M
Description  128Mbit MOBILE DDR SDRAM based on 1M x 4Bank x32 I/O
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

H5MS1222EFP-Q3M Datasheet(HTML) 31 Page - Hynix Semiconductor

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Rev 1.0 / Jun. 2008
31
Mobile DDR SDRAM 128Mbit (4M x 32bit)
H5MS1222EFP Series
READ
The basic Read timing parameters for DQ are shown next figure (Basic Read Timing Parameters). They apply to all
Read operations. During Read bursts, DQS is driven by the Mobile DDR SDRAM along with the output data. The initial
Low state of the DQS is known as the read preamble; the Low state coincident with last data-out element is known as
the read postamble.
Basic Read Timing Parameters
Do
n
Do
n+ 1 Don+ 2 Don+3
/CLK
CLK
tCK
tCK
tCH
tCL
tRPRE
tDQSCK
tD QSQ
max
tAC
tLZ
tQ H
tDQ SCK
tQ H
tQ H
tHZ
tQ H
tRPRE
tDQSCK
tLZ
tDQ SCK
tRPST
tAC
tDQSQ m ax
Do
n
Do
n+1 Don+2 Don+3
DQS
DQ
DQS
DQ
Don't Care
1) D o
n : Data Out from colum n n
2) All DQ are vaild tAC after the CK edge
All D Q are vaild tD QSQ after the DQ S edge, regardless of tAC
tRPST
tACm ax
tACm in
tQH
tHZ


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