Rev. 1.0 / May 2009

10

PPre

H5DU1262GTR Series

POWER-UP SEQUENCE AND DEVICE INITIALIZATION

DDR SDRAMs must be powered up and initialized in a predefined manner. Operational procedures other than those

specified may result in undefined operation. Power must first be applied to V

(and to the system VTT). VTT must be applied after V

LVCMOS LOW level after V

guarantee that the DQ and DQS outputs will be in the High-Z state, where they will remain until driven in normal oper-

ation (by a read access). After all power supply and reference voltages are stable, and the clock is stable, the DDR

SDRAM requires a 200us delay prior to applying an executable command.

Once the 200us delay has been satisfied, a DESELECT or NOP command should be applied, and CKE should be

brought HIGH. Following the NOP command, a PRECHARGE ALL command should be applied. Next a EXTENDED

MODE REGISTER SET command should be issued for the Extended Mode Register, to enable the DLL, then a MODE

REGISTER SET command should be issued for the Mode Register, to reset the DLL, and to program the operating

ter set command, a PRECHARGE ALL command should be applied, placing the device in the all banks idle state.

Once in the idle state, two AUTO REFRESH cycles must be performed. Additionally, a MODE REGISTER SET command

for the Mode Register, with the reset DLL bit deactivated low (i.e. to program operating parameters without resetting

the DLL) must be performed. Following these cycles, the DDR SDRAM is ready for normal operation.

1. Apply power - V

MOS low state. (All the other input pins may be undefined.)

•V

• VTT is limited to 1.44V (reflecting V

• If the above criteria cannot be met by the system design, then the following sequencing and voltage relation-

ship must be adhered to during power up.

2. Start clock and maintain stable clock for a minimum of 200usec.

3. After stable power and clock, apply NOP condition and take CKE high.

4. Issue Extended Mode Register Set (EMRS) to enable DLL.

5. Issue Mode Register Set (MRS) to reset DLL and set device to idle state with bit A8=high. (An additional 200

6. Issue Precharge commands for all banks of the device.

7.

Issue 2 or more Auto Refresh commands.

8. Issue a Mode Register Set command to initialize the mode register with bit A8 = Low

Voltage description

Sequencing

Voltage relationship to avoid latch-up

V

DDQ

After or with V

DD

< V

VTT

After or with V

DDQ

< V

After or with V

DDQ

< V