HYMD264M726AL8-K datasheet(10/19 Pages) HYNIX

Part #	HYMD264M726AL8-K

Description	Unbuffered DDR SO-DIMM with PLL

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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10 / 19 page

HYMD264M726A(L)8-J/M/K/H/L

Rev. 0.1/Apr. 02

10

AC CHARACTERISTICS (AC operating conditions unless otherwise noted)

- continued -

Parameter

Symbol

DDR333

DDR266(2-2-2)

Unit

Note

Min

Max

Min

Max

Write DQS Low Level Width

tDQSL

0.35

-

0.35

-

CK

Clock to First Rising edge of DQS-In

tDQSS

0.75

1.25

0.72

1.28

CK

Data-In Setup Time to DQS-In (DQ & DM)

tDS

0.45

-

0.5

-

ns

6,7, 11~13

Data-in Hold Time to DQS-In (DQ & DM)

tDH

0.45

-

0.5

-

ns

6,7, 11~13

DQ & DM Input Pulse Width

tDIPW

1.75

-

1.75

-

ns

Read DQS Preamble Time

tRPRE

0.9

1.1

0.9

1.1

CK

Read DQS Postamble Time

tRPST

0.4

0.6

0.4

0.6

CK

Write DQS Preamble Setup Time

tWPRES

0-

0

-

CK

Write DQS Preamble Hold Time

tWPREH

0.25

-

0.25

-

CK

Write DQS Postamble Time

tWPST

0.4

0.6

0.4

0.6

CK

Mode Register Set Delay

tMRD

2-

2

-

CK

Exit Self Refresh to Any Execute Command

tXSC

200

-

200

-

CK

8

Average Periodic Refresh Interval

tREFI

-

15.6

-

15.6

us

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HYMD264M726AL8-K Datasheet(PDF) 10 Page - Hynix Semiconductor

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