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P5LS10206SZWTTQ1R Datasheet(PDF) 1 Page - Texas Instruments |
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P5LS10206SZWTTQ1R Datasheet(HTML) 1 Page - Texas Instruments |
1 / 101 page TMS570LS20216, TMS570LS20206, TMS570LS10216 TMS570LS10206, TMS570LS10116, TMS570LS10106 www.ti.com SPNS141 – MARCH 2010 TMS570LS Series 16/32-BIT RISC Flash Microcontroller Check for Samples: TMS570LS20216, TMS570LS20206, TMS570LS10216, TMS570LS10206, TMS570LS10116, TMS570LS10106 1 TMS570LS Series 16/32-BIT RISC Flash Microcontroller 1.1 Features 12 • High-Performance Automotive Grade • Communication Interfaces Microcontroller for Safety Critical Applications – Three Multi-buffered Serial Peripheral – Certified for use in SIL3 Applications Interface (MibSPI) each with: – Dual CPU’s running in Lockstep • Four chip selects and one Enable pin – ECC on Flash and SRAM • 128 buffers with parity – CPU and Memory BIST (Built-In Self Test) • One with parallel mode – Error Signaling Module (ESM) w/ Error Pin – Two UART (SCI) interfaces with Local Interconnect Network Interface (LIN 2.0) • ARM® Cortex™-R4F 32-Bit RISC CPU – Three CAN (DCAN) Controller – Efficient 1.6 DMIPS/MHz with 8-stage pipeline • Two with 64 mailboxes, one with 32 – Floating Point Unit with Single/Double • Parity on mailbox RAM Precision – Dual Channel FlexRay™ Controller – Memory Protection Unit (MPU) • 8K-Byte message RAM with parity – Open Architecture With Third-Party Support • Transfer Unit with MPU and parity • Operating Features • High-End Timer (nHET) – Up to 160-MHz System Clock – 32 Programmable I/O Channels – Core Supply Voltage (VCC): 1.5 V – 128 Words High-End Timer RAM with parity – I/O Supply Voltage (VCCIO): 3.3 V – Transfer Unit with MPU and parity • Integrated Memory • Two 12-Bit Multi-Buffered ADCs (MibADC) – 1M-Byte or 2M-Byte Flash with ECC – 24 total ADC Input channels – 128K-Byte or 160K-Byte RAM with ECC – Each has 64 Buffers with parity • Multiple Communication interfaces including • Trace and Calibration Interfaces Flexray, CAN, and LIN – Embedded Trace Module (ETMR4) • NHET Timer and 2x 12-bit ADC's – Data Modification Module (DMM) • External Memory Interface (EMIF) – RAM Trace Port (RTP) – 16bit Data, 22bit Address, 4 Chip Selects – Parameter Overlay Module (POM) • Common TMS470/570 Platform Architecture • On-Chip emulation logic including IEEE 1149.1 – Consistent Memory Map across the family JTAG, Boundary Scan and ARM Coresight – Real-Time Interrupt (RTI) OS Timer components – Vectored Interrupt Module (VIM) • Full Development Kit Available – Cyclic Redundancy Checker (CRC) – Development Boards • Direct Memory Access (DMA) Controller – Code Composer Studio Integrated Development Environment (IDE) – 32 Control Packets and 16 Channels – HaLCoGen Code Generation Tool – Parity on Control Packet Memory – HET Assembler and Simulator – Dedicated Memory Protection Unit (MPU) – nowFlash Flash Programming Tool • Frequency-Modulated Zero-Pin Phase-Locked Loop (FMZPLL)-Based Clock Module • Packages Supported – Oscillator and PLL clock monitor – 144-Pin Quad Flatpack (PGE) [Green] • Up to 115 Peripheral IO pins – 337-Pin Ball Grid Array (ZWT) [Green] – 16 Dedicated GIO - 8 w/ External Interrupts • Community Resources – Programmable External Clock (ECLK) – TI E2E Community 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCT PREVIEW information concerns products in the formative Copyright © 2010, Texas Instruments Incorporated or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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