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LTC2952IF Datasheet(PDF) 11 Page - Linear Technology |
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LTC2952IF Datasheet(HTML) 11 Page - Linear Technology |
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11 / 30 page  LTC2952 11 2952fa pin provides on/off power supply control via the EN pin, which is typically connected to an external DC/DC con- verter. Setting the PB pin low for a time determined by the ONT timing capacitor toggles the EN pin high impedance. Letting this pin toggle high and then setting this pin low again for 26ms asserts INT low. After the INT pin asserts low, if the PB pin is still held low for a time determined by the OFFT timing capacitor, the process of turning off the system power begins. At the end of the turn-off process, the EN pin is set low. Leave this pin open if pushbutton function is not used. PFI (Pin 5/Pin 2): Power Fail Input. High impedance input to an accurate comparator with a 0.5V falling threshold and 15mV hysteresis. This pin controls the state of the PFO output pin. Tie to device GND if power fail monitoring function is not used. PFO (Pin 9/Pin 6): Power Fail Output. This pin is an open- drain pull-down which pulls low when the PFI input is below 0.5V. Leave this pin open or tied to GND if power fail monitoring function is not used. RST (Pin 8/Pin 5): Reset Output. This pin is an open-drain pull-down. Pulls low when VM input is below 0.5V and held low for 200ms after VM input is above 0.5V. Also pulls low for 200ms when the watchdog timer (1.6s) is allowed to time out. Leave this pin open or tied to GND if voltage monitoring function is not used. V1 (Pin 18/Pin 15): Primary Input Supply Voltage: 2.7V to 28V. Supplies power to the internal circuitry and is the anode input of the primary ideal diode driver (the cathode input to the ideal diode drivers is the VS pin). A battery or other primary power source usually provides power to this input. Minimize the capacitance on this pin in applications where the pin can be high impedance (disconnected or inherent high source impedance). Otherwise, an optional bypass capacitor to ground in the range of 0.1μF to 10μF can be used. V2 (Pin 16/Pin 13): Secondary Input Supply Voltage: 2.7V to 28V. Supplies power to the internal circuitry and is the anode input of the secondary ideal diode driver (the cathode input to the ideal diode drivers is the VS pin). A secondary power source such as a wall adapter, usually provides power to this input. Minimize the capacitance on this pin in applications where the pin can be high imped- ance (disconnected or inherent high source impedance). Otherwise, an optional bypass capacitor to ground in the range of 0.1μF to 10μF can be used. VM (Pin 4/Pin 1): Voltage Monitor Input. High impedance input to an accurate comparator with a 0.5V threshold. Together with the WDE pin controls the state of the RST output pin. Tie to device GND if voltage monitoring func- tion is not used. VS (Pin 17/Pin 14): Power Sense Input. This pin supplies power to the internal circuitry and is the cathode input to the ideal diode drivers (the anode inputs to the ideal diode drivers are the V1 and V2 pins). Bypass this pin to ground with one or more capacitors of at least 0.1μF. WDE (Pin 6/Pin 3): Watchdog/Extend Input. A three-state input pin. A rising or falling edge must occur on this pin within a 1.6s watchdog timeout period (while the RST output is high impedance), to prevent the RST pin from going low. The watchdog function of this pin is disabled when both of the ideal diode drivers are disabled in certain PowerPath configurations (refer to the Applica- tion Information section). During a shutdown process: a rising or falling edge on this WDE pin within the 500ms tKILL,OFF WAIT period extends the waiting period another 500ms before the EN line is set low. This extend process can be repeated indefinitely in order to provide as much time as possible for the microprocessor to do its house- keeping functions before a power shutdown. Leave open or drive in Hi-Z state with a three-state buffer to disable watchdog or extend function or both. PIN FUNCTIONS (TSSOP/QFN) |
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