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DM9000EP Datasheet(PDF) 30 Page - Davicom Semiconductor, Inc.

Part # DM9000EP
Description  ISA to Ethernet MAC Controller with Integrated 10/100 PHY
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Manufacturer  DAVICOM [Davicom Semiconductor, Inc.]
Direct Link  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.

DM9000EP Datasheet(HTML) 30 Page - Davicom Semiconductor, Inc.

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DM9000
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
Final
30
Version: DM9000-DS-F03
April 23, 2009
0010
Acknowledge Match
0011
Acknowledge Match Fail
0100
Consistency Match
0101
Consistency Match Fail
0110
Parallel Detects Signal_ link_ ready
0111
Parallel Detects Signal_ link_ ready Fail
1000
Auto-negotiation Completed Successfully
8.10 10BASE-T Configuration/Status (10BTCSR) - 18
Bit
Bit Name
Default
Description
18.15
RESERVED
0, RO
Reserved
Write as 0, ignore on read
18.14
LP_EN
1, RW
Link Pulse Enable
1 = Transmission of link pulses enabled
0 = Link pulses disabled, good link condition forced
This bit is valid only in 10Mbps operation
18.13
HBE
1,RW
Heartbeat Enable
1 = Heartbeat function enabled
0 = Heartbeat function disabled
When the PHY is configured for full duplex operation, this bit will be
ignored (the collision/heartbeat function is invalid in full duplex
mode)
18.12
SQUELCH
1, RW
Squelch Enable
1 = normal squelch
0 = low squelch
18.11
JABEN
1, RW
Jabber Enable
Enables or disables the Jabber function when the PHY is in
10BASE-T full duplex or 10BASE-T transceiver loopback mode
1 = Jabber function enabled
0 = Jabber function disabled
18.10-18.
1
RESERVED
0, RO
Reserved
Write as 0, ignore on read
18.0
POLR
0, RO
Polarity reversed
When this bit is set to 1, it indicates that the 10Mbps cable polarity is
reversed. This bit is set and cleared by 10BASE-T module
automatically


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