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T108 Release
Copyright by Terawins, Inc.
81
3.12.8
Chroma Saturation Register
Address Offset:
0Ah
Access:
Read/Write
Default Value:
80h
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
R/W
SATURATION
Chroma_out
= Chroma_in * SATURATION
where SATURATION is a 1.7-bit fixed point value
3.12.9
Chroma Hue Phase Register
Address Offset:
0Bh
Access:
Read/Write
Default Value:
00h
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
R/W
HUE
U_out = U_in*cos(
HUE/256*360) + V_in * sin(HUE/256*360)
V_out = V_in*cos(
HUE/256*360) - U_in * sin(HUE/256*360)
3.12.10 Chroma AGC Register
Address Offset:
0Ch
Access:
Read/Write
Default Value:
8ah
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
R/W
CHROMA_AGC
Chroma AGC target. Default = 138.
3.12.11 AGC Peak Nominal Register
Address Offset:
10h
Access:
Read/Write
Default Value:
0ah
Size:
8 bits
Bit
Access
Symbol
Description
[7]
RO
Reserved
[6:0]
R/W
AGC_PEAK
Luma peak value. Default = 10.
3.12.12 Chroma DTO Incremental 0 Register
Address Offset:
18h
Access:
Read/Write
Default Value:
21h
Size:
8 bits
Bit
Access
Symbol
Description
[7]
R/W
CHROMA_FREQ_FIX Fix chroma frequency.
0: disable (default).
1: enable.
[6]
RO
Reserved
[5:0]
R/W
C_FREQ[29:24]
Bits 29:24 of the 30-bit-wide chroma frequency increment.
3.12.13 Chroma DTO Incremental 1 Register
Address Offset:
19h
Access:
Read/Write
Default Value:
F0h
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
R/W
C_FREQ[23:16]
Bits 23:16 of the 30-bit-wide chroma frequency increment.
3.12.14 Chroma DTO Incremental 2 Register
Address Offset:
1Ah
Access:
Read/Write
Default Value:
7Ch
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
R/W
C_FREQ[15:8]
Bits 15:8 of the 30-bit-wide chroma frequency increment.
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