T108 Release
Copyright by Terawins, Inc.
35
2.7.3.11 OSD1 Pattern_Fill Pattern RAM Write Port Register
Address Offset:
OSD1 PF _37h
Access:
Read/Write
Default Value:
00h
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
WO
PRAM_WrD_Port[10:8] For building pattern, need to load via writing pattern to PRAM (Pattern
RAM). After reset PRAM pointer, the PRAM pointer will increase after
each burst write.
2.7.3.12 OSD1 Pattern_Fill Position, Horizontal Start LSB Register
Address Offset:
OSD1 PF _38h
Access:
Read/Write
Default Value:
00h
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
R/W
Patt_HStart[7:0]
Allowable pattern display region: horizontal start
2.7.3.13 OSD1 Pattern_Fill Position, Horizontal Start MSB Register
Address Offset:
OSD1 PF _39h
Access:
Read/Write
Default Value:
00h
Size:
8 bits
Bit
Access
Symbol
Description
[7:3]
RO
Reserved
[2:0]
R/W
Patt_HStart[10:8]
Allowable pattern display region: horizontal start
2.7.3.14 OSD1 Pattern_Fill Position, Vertical Start LSB Register
Address Offset:
OSD1 PF _3Ah
Access:
Read/Write
Default Value:
00h
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
R/W
Patt_VStart[7:0]
Allowable pattern display region: vertical start
2.7.3.15 OSD1 Pattern_Fill Position, Vertical Start MSB Register
Address Offset:
OSD1 PF _3Bh
Access:
Read/Write
Default Value:
00h
Size:
8 bits
Bit
Access
Symbol
Description
[7:3]
RO
Reserved
[2:0]
R/W
Patt_VStart[10:8]
Allowable pattern display region: vertical start
2.7.3.16 OSD1 Pattern_Fill Position, Horizontal End LSB Register
Address Offset:
OSD1 PF _3Ch
Access:
Read/Write
Default Value:
00h
Size:
8 bits
Bit
Access
Symbol
Description
[7:0]
R/W
Patt_HEnd[7:0]
Allowable pattern display region: horizontal End
2.7.3.17 OSD1 Pattern_Fill Position, Horizontal End MSB Register
Address Offset:
OSD1 PF _3Dh
Access:
Read/Write
Default Value:
01h
Size:
8 bits
Bit
Access
Symbol
Description
[7:3]
RO
Reserved
[2:0]
R/W
Patt_HEnd[10:8]
Allowable pattern display region: horizontal End
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