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CHA2093RBF Datasheet(PDF) 4 Page - United Monolithic Semiconductors |
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CHA2093RBF Datasheet(HTML) 4 Page - United Monolithic Semiconductors |
4 / 8 page CHA2093RBF 20-30GHz Low Noise Amplifier Ref. : DSCHA2093RBF2057 -26-Feb.-02- 4/8 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 Biasing Options This chip inside the SMD type package is a two stage amplifier, and flexibility is provided by the access to number of pads. The internal DC electrical schematic is given in order to use these pads in a safe way. IN OUT Vg 1 Vg 2 25 50 Vd Vds1 Vds2 The two requirements are : N°1: Not exceed Vds = 3.5Volt ( internal Drain to Source voltage ). N°2: Not biased in such a way that Vgs becomes positive. ( internal Gate to Source voltage ) We propose two standard biasing : 1) Low Noise and low consumption : Vd = 3.5V and Id = 30mA ( Vg1=Vg2) 2) Low Noise and high output power : Vd = 4.0V and Id = 45mA. (A separate acces to the gate voltages of the first and the output stage is provided. Nominal bias is obtained for a typical current of 30mA for the output stage and 15 mA for the first stage. The first step to bias the amplifier is to tune the Vg1 =-1V and Vg2 to drive 30mA for the full amplifier. Then Vg1 is reduced to obtain 45 mA of current through the amplifier.) |
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