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TDA8029 Datasheet(PDF) 49 Page - NXP Semiconductors |
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TDA8029 Datasheet(HTML) 49 Page - NXP Semiconductors |
49 / 59 page 9397 750 14145 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 03 — 22 February 2005 49 of 59 Philips Semiconductors TDA8029 Low power single card reader ICC output current 5 V card; VCC = 0 V to 5 V - - 65 mA 3 V card; VCC = 0 V to 3 V; VDD > 3.0 V - - 65 mA 3 V card; VCC = 0 V to 3 V; VDD < 3.0 V - - 50 mA 1.8 V card; VCC = 0 V to 1.8 V; - - 30 mA VCC shorted to ground (current limitation) - - 120 mA SRr, SRf slew rate, rise and fall maximum load capacitor = 300 nF 0.05 0.16 0.22 V/ µs Vripple(p-p) ripple voltage on VCC (peak-to-peak value) 20 kHz<f<200 MHz - - 350 mV Data line: pin I/O, with an integrated 14k Ω pull-up resistor to VCC VO(inactive) output voltage inactive no load 0 - 0.1 V IO(inactive) = 1 mA - - 0.3 V IO(inactive) current from I/O inactive; pin grounded - - −1mA VOL LOW-level output voltage I/O configured as output; IOL =1mA 0 - 0.3 V VOH HIGH-level output voltage I/O configured as output; VCC = 5 V or 3 V IOH < −40 µA 0.75VCC -VCC + 0.25 V IOH < −20 µA 0.8VCC -VCC + 0.25 V IOH = 0 A 0.9VCC -VCC + 0.25 V VIL LOW-level input voltage I/O configured as input −0.3 - +0.8 V VIH HIGH-level input voltage I/O configured as input 1.5 - VCC V IIL input current LOW VIL =0V - - 500 µA ILI(H) input leakage current HIGH VIH =VCC -- 10 µA ti(T) input transition time CL ≤ 65 pF - - 1 µs to(T) output transition time CL ≤ 65 pF - - 0.1 µs Rpu internal pull-up resistance between I/O and VCC 11 14 17 k Ω tedge width of active pull-up pulse I/O configured as output, rising from LOW to HIGH 2/fXTAL1 - 3/fXTAL1 ns Iedge current from I/O when active pull-up VOH = 0.9VCC, C=60pF −1 --mA Timings tact activation sequence duration - - 130 µs tde deactivation sequence duration - - 100 µs Table 75: Characteristics …continued VDD =VDCIN = 3.3 V; Tamb =25 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit |
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