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ACE24C02DP+TH Datasheet(PDF) 4 Page - ACE Technology Co., LTD. |
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ACE24C02DP+TH Datasheet(HTML) 4 Page - ACE Technology Co., LTD. |
4 / 17 page ACE24(L)C02/04/08/16 Technology Two-wire Serial EEPROM VER 1.3 4 Ordering information Selection Guide ACE24(L)C02/04/08/16 XX + X H Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Serial Data (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices. Device/Page Addresses (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the ACE24(L)C02, As many as eight 2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). The ACE24(L)C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect. The ACE24(L)C08 only uses A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins are no connects. The ACE24(L)C16 does not use the device address pins, which limits the number of devices on a single bus to one. The A0, A1 and A2 pins are no connects. Write Protect (WP): The ACE24(L)C02/04/08/16 has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is conceded to Vcc the write protection feature is enabled. Write Protect Description Part of the Array Protected WP Pin Status ACE24(L)C02 ACE24(L)C04 ACE24(L)C08 ACE24(L)C16 WP=VCC Full (2K) Array Full (4K) Array Full (8K) Array Upper Half (8K) Array WP=GND Normal Read / Write Operations Pb - free U : Tube T : Tape and Reel DP : PDIP-8 FM : SOP-8 TM : TSSOP-8 Halogen-free |
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