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PPC5603PFF0VLQ7R Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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PPC5603PFF0VLQ7R Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 84 page  MPC5604P Microcontroller Data Sheet, Rev. 5 Preliminary—Subject to Change Without Notice Freescale Semiconductor 10 2.2.3 Pin Muxing Table 4 defines the pin list and muxing for the MPC5604P devices. Each row of Table 4 shows all the possible ways of configuring each pin, via “alternate functions”. The default function assigned to each pin after reset is the ALT0 function. Pins marked as external interrupt capable can also be used to resume from STOP and HALT mode. MPC5604P devices provide four main I/O pad types depending of the associated functions: • Slow pads are the most common, providing a compromise between transition time and low electromagnetic emission. • Medium pads provide fast enough transition for serial communication channels with controlled current to reduce electromagnetic emission. • Fast pads provide maximum speed. They are used for improved NEXUS debugging capability. • Symmetric pads are designed to meet FlexRay requirements. Medium and Fast pads can use slow configuration to reduce electromagnetic emission, at the cost of reducing AC performance. Table 3. System Pins Symbol Description Direction Pad Speed1 1 SRC values refer to the value assigned to the Slew Rate Control bits of the pad configuration register Pin SRC=0 SRC=1 100-pin 144-pin Dedicated pins. All pins available on 144-pin package. MDO 0 not available on 100-pin package. MDO 0 Nexus Message Data Output—line 0 Output Only Fast — 9 NMI Non Maskable Interrupt Input Only — — 1 1 XTAL Analog input of the oscillator amplifier circuit. Needs to be grounded if oscillator is used in bypass mode. —— — 18 29 EXTAL Analog output of the oscillator amplifier circuit, when the oscillator is not in bypass mode. Analog input for the clock generator when the oscillator is in bypass mode. —— — 19 30 TMS2 2 In this pin there is an internal pull, refer to JTAGC chapter on MPC5604P Reference Manual for pull direction. JTAG state machine control Input Only — — 59 87 TCK2 JTAG clock Input Only — — 60 88 TDI2 JTAG data input Input Only — — 58 86 TDO2 JTAG data output Output Only Slow Fast 61 89 Reset pin, available on 100-pin and 144-pin package. RESET Bidirectional reset with Schmitt trigger characteristics and noise filter Bidirectional Medium — 20 31 Test pin, available on 100-pin and 144-pin package. VPP TEST Pin for testing purpose only. To be tied to ground in normal operating mode. —— — 74 107 |
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Similar Description - PPC5603PFF0VLQ7R |
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