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MC9328MX21CJM Datasheet(PDF) 20 Page - Freescale Semiconductor, Inc |
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MC9328MX21CJM Datasheet(HTML) 20 Page - Freescale Semiconductor, Inc |
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20 / 100 page  MC9328MX21 Technical Data, Rev. 3.3 20 Freescale Semiconductor Specifications Figure 4. Assertion of DMA External Grant Signal Figure 5 shows the safe maximum time for which External DMA request can be kept asserted, after sensing grant signal active such that a new burst is not initiated. Figure 5. Safe Maximum Timings for External Request De-Assertion 3.8 BMI Interface Timing Diagram 3.8.1 Connecting BMI to ATI MMD Devices 3.8.1.1 ATI MMD Devices Drive the BMI_CLK/CS In this mode MMD_MODE_SEL bit is set and MMD_CLKOUT bit is cleared. BMI_WRITE and BMI_CLK/CS are input signals to BMI driving by ATI MMD chip set. Output signal BMI_READ_REQ can be used as interrupt signal to inform MMD that data is ready in BMI TxFIFO for read access. MMD Table 13. DMA External Request and Grant Timing Parameters Parameter Description 3.0 V 1.8 V Unit WCS BCS WCS BCS tmin_assert Minimum assertion time of External Grant signal 8 hclk + 8.6 8 hclk + 2.74 8 hclk + 7.17 8 hclk + 3.25 ns tmax_req_assert Maximum External request assertion time after assertion of Grant signal 9 hclk - 20.66 9 hclk - 6.7 9 hclk - 17.96 9 hclk - 8.16 ns tmax_read Maximum External request assertion time after first read completion 8 hclk - 6.21 8 hclk - 0.77 8 hclk - 5.84 8 hclk - 0.66 ns tmax_write Maximum External request assertion time after completion of first write 3 hclk - 15.87 3 hclk - 8.83 3 hclk - 15.9 3 hclk - 9.12 ns Ext_DMAReq Ext_DMAGrant tmin_assert Ext_DMAReq Data read from External device Data written to External device Ext_DMAGrant tmax_write tmax_read tmax_req_assert NOTE: Assuming in worst case the data is read/written from/to External device as per the above waveform. |
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