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MC9S08QG8CFKE Datasheet(PDF) 72 Page - Freescale Semiconductor, Inc |
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MC9S08QG8CFKE Datasheet(HTML) 72 Page - Freescale Semiconductor, Inc |
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72 / 314 page  Chapter 5 Resets, Interrupts, and General System Control MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5 70 Freescale Semiconductor 5.8.4 System Options Register 1 (SOPT1) This high page register is a write-once register so only the first write after reset is honored. It can be read at any time. Any subsequent attempt to write to SOPT1 (intentionally or unintentionally) is ignored to avoid accidental changes to these sensitive settings. SOPT1 must be written during the user reset initialization program to set the desired controls even if the desired settings are the same as the reset settings. 76 5 4 1 1 Bit 4 is reserved; writes will change the value but will have no effect on this MCU. 321 0 R COPE COPT STOPE 00 BKGDPE RSTPE W Reset: 110 10 01 u(2) 2 u = unaffected POR: 110 10 010 LVD: 110 10 010 = Unimplemented or Reserved Figure 5-5. System Options Register 1 (SOPT1) Table 5-6. SOPT1 Register Field Descriptions Field Description 7 COPE COP Watchdog Enable — This write-once bit selects whether the COP watchdog is enabled. 0 COP watchdog timer disabled. 1 COP watchdog timer enabled (force reset on timeout). 6 COPT COP Watchdog Timeout — This write-once bit selects the timeout period of the COP. COPT along with COPCLKS in SOPT2 defines the COP timeout period. 0 Short timeout period selected. 1 Long timeout period selected. 5 STOPE Stop Mode Enable — This write-once bit is used to enable stop mode. If stop mode is disabled and a user program attempts to execute a STOP instruction, an illegal opcode reset is forced. 0 Stop mode disabled. 1 Stop mode enabled. 1 BKGDPE Background Debug Mode Pin Enable — This write-once bit when set enables the PTA4/ACMPO/BKGD/MS pin to function as BKGD/MS. When clear, the pin functions as one of its output only alternative functions. This pin defaults to the BKGD/MS function following any MCU reset. 0 PTA4/ACMPO/BKGD/MS pin functions as PTA4 or ACMPO. 1 PTA4/ACMPO/BKGD/MS pin functions as BKGD/MS. 0 RSTPE RESET Pin Enable — This write-once bit when set enables the PTA5/IRQ/TCLK/RESET pin to function as RESET. When clear, the pin functions as one of its input only alternative functions. This pin defaults to its input-only port function following an MCU POR. When RSTPE is set, an internal pullup device is enabled on RESET. 0PTA5/IRQ/TCLK/RESET pin functions as PTA5, IRQ, or TCLK. 1PTA5/IRQ/TCLK/RESET pin functions as RESET. |
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