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78P2343JAT Datasheet(PDF) 32 Page - Teridian Semiconductor Corporation

Part No. 78P2343JAT
Description  3-port E3/DS3/STS-1 LIU with Jitter Attenuator
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Maker  TERIDIAN [Teridian Semiconductor Corporation]
Homepage  http://www.teridian.com
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78P2343JAT Datasheet(HTML) 32 Page - Teridian Semiconductor Corporation

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78P2343JAT
3-port E3/DS3/STS-1 LIU
with Jitter Attenuator
Page 32 of 37
2005 Teridian Semiconductor Corporation
Rev 2.2
ELECTRICAL SPECIFICATIONS (continued)
RECEIVER JITTER TRANSFER FUNCTION
The receiver clock recovery loop characteristics are such that the receiver has the following transfer function.
When the Jitter Attenuator (JAT) is enabled in the receive or transmit path, the receiver or transmitter will
exhibit a jitter transfer as shown in the graph and table below. Jitter Attenuator operation is guaranteed through
digital scan testing. The actual jitter transfer is guaranteed by logic design and is not tested during production
testing.
PARAMETER
CONDITION
MIN
NOM
MAX
UNIT
Receiver Jitter transfer function
Below Fc
0.1
dB
At –3dB point
JABW= 0, E3 mode (default)
JABW= 1, E3 mode
JABW= 0, DS3 mode (default)
JABW= 1, DS3 mode
JABW= 0, STS1 mode
JABW= 1, STS1 mode (default)
13
188
17
245
20
283
Hz
Receiver Jitter Bandwidth, Fc
JAEN= 0, JAT disabled
55
kHz
Jitter transfer function roll-off
After Fc
20
dB per
decade
-50
-40
-30
-20
-10
0
10
Jitter Frequency
10
100
1k
10k
100k
1M
ETSI TBR 24 (E3)
E3 JAT
DS3 JAT
STS1 JAT
JAT Disabled
40Hz
1kHz
27Hz
40kHz
59.6kHz


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