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78P2343JAT Datasheet(PDF) 30 Page - Teridian Semiconductor Corporation

Part No. 78P2343JAT
Description  3-port E3/DS3/STS-1 LIU with Jitter Attenuator
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Maker  TERIDIAN [Teridian Semiconductor Corporation]
Homepage  http://www.teridian.com
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78P2343JAT Datasheet(HTML) 30 Page - Teridian Semiconductor Corporation

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78P2343JAT
3-port E3/DS3/STS-1 LIU
with Jitter Attenuator
Page 30 of 37
2005 Teridian Semiconductor Corporation
Rev 2.2
ELECTRICAL SPECIFICATIONS (continued)
E3 – RECEIVER SPECIFICATIONS (Transformer-coupled)
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
MON=0
(See Note 1)
120
1200
mVpk
Peak Differential Input
Amplitude, LINPx and LINNx
MON=1
(See Note 2)
25
100
mVpk
Flat-loss Tolerance
MON=0.
All valid cable lengths.
0
6
dB
Receive Clock Jitter
With 100Hz-800kHz filter:
a) Normal receive mode
b) Remote loopback mode
0.1
0.06
UIpp
UIpp
Interfering Tone Tolerance
(see Note 3)
Maximum ratio of Interference Power
to Signal Power for BER < 10
-8
a) With 0ft cable
b) With 900ft cable
-9
-10
dB
dB
Note 1:
Min spec corresponds to signal amplitude of 950mVpk at source, 12dB of cable loss (1100ft) and 6dB
of flat attenuation. Error-free receiver performance is guaranteed for all cable less than 1100ft. Typical
part can handle up to 1350ft.
Note 2:
Min spec corresponds to signal amplitude of 1000mVpk at source, 12dB of cable loss (1100ft) and
20dB of flat attenuation. In monitor mode, interfering tone performance is not guaranteed.
Note 3:
Interfering signal is a non-synchronous E3 signal of the specified power level below the desired E3
signal. Both data and interfering signals are PRBS23 (2
23-1) pattern.


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