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71M6521BE Datasheet(PDF) 6 Page - Teridian Semiconductor Corporation |
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71M6521BE Datasheet(HTML) 6 Page - Teridian Semiconductor Corporation |
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6 / 97 page  71M6521BE Energy Meter IC DATA SHEET JANUARY 2008 Page: 6 of 97 © 2005-2008 TERIDIAN Semiconductor Corporation V1.0 List of Tables Table 1: Inputs Selected in Regular and Alternate Multiplexer Cycles ...........................................................................9 Table 2: CE DRAM Locations for ADC Results............................................................................................................13 Table 3: Memory Map ..........................................................................................................................................16 Table 4: Stretch Memory Cycle Width..........................................................................................................................17 Table 5: Internal Data Memory Map.............................................................................................................................18 Table 6: Special Function Registers Locations ............................................................................................................18 Table 7: Special Function Registers Reset Values ......................................................................................................19 Table 8: PSW Register Flags.......................................................................................................................................20 Table 9: PSW Bit Functions .........................................................................................................................................20 Table 10: Port Registers ..........................................................................................................................................21 Table 11: Special Function Registers...........................................................................................................................22 Table 12: Baud Rate Generation..................................................................................................................................23 Table 13: UART Modes ..........................................................................................................................................23 Table 14: The S0CON Register ...................................................................................................................................23 Table 15: The S1CON register.....................................................................................................................................23 Table 16: The S0CON Bit Functions ............................................................................................................................24 Table 17: The S1CON Bit Functions ............................................................................................................................24 Table 18: The TCON Register......................................................................................................................................25 Table 19: The TCON Register Bit Functions................................................................................................................25 Table 20: The TMOD Register .....................................................................................................................................26 Table 21: TMOD Register Bit Description ....................................................................................................................26 Table 22: Timers/Counters Mode Description ..............................................................................................................26 Table 23: Timer Modes ..........................................................................................................................................27 Table 24: The PCON Register .....................................................................................................................................27 Table 25: PCON Register Bit Description.....................................................................................................................27 Table 26: The IEN0 Register (see also Table 32) ........................................................................................................28 Table 27: The IEN0 Bit Functions (see also Table 32).................................................................................................28 Table 28: The IEN1 Register (see also Tables 30/31) .................................................................................................28 Table 29: The IEN1 Bit Functions (see also Tables 31/32) ..........................................................................................28 Table 30: The IP0 Register (see also Table 45)...........................................................................................................29 Table 31: The IP0 bit Functions (see also Table 45)....................................................................................................29 Table 32: The WDTREL Register.................................................................................................................................29 Table 33: The WDTREL Bit Functions .........................................................................................................................29 Table 34: The IEN0 Register........................................................................................................................................30 Table 35: The IEN0 Bit Functions ................................................................................................................................30 Table 36: The IEN1 Register........................................................................................................................................30 Table 37: The IEN1 Bit Functions ................................................................................................................................31 Table 38: The IEN2 Register........................................................................................................................................31 Table 39: The IEN2 Bit Functions ................................................................................................................................31 Table 40: The TCON Register......................................................................................................................................31 Table 41: The TCON Bit Functions ..............................................................................................................................31 Table 42: The T2CON Bit Functions ............................................................................................................................32 Table 43: The IRCON Register ....................................................................................................................................32 Table 44: The IRCON Bit Functions.............................................................................................................................32 Table 45: External MPU Interrupts ...............................................................................................................................33 |
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