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Copyright 2009 Cirrus Logic

DS752PP8

CS4970x4 Data Sheet

32-bit High Definition Audio Decoder DSP Family

Table of Contents

1. Documentation Strategy ................................................................................................................ 4

2. Overview .......................................................................................................................................... 4

2.1 Migrating from the CS495xx(2) to the CS4970x4 ........................................................................................... 6

2.2 Licensing ......................................................................................................................................................... 6

3. Code Overlays ................................................................................................................................. 6

4. Hardware Functional Description ................................................................................................. 7

4.1 Coyote DSP Core ........................................................................................................................................... 7

4.1.1 DSP Memory ...................................................................................................................................... 7

4.1.2 DMA Controller ................................................................................................................................... 7

4.2 On-chip DSP Peripherals ................................................................................................................................ 7

4.2.1 Digital Audio Input Port (DAI) ............................................................................................................. 7

4.2.2 Digital Audio Output Port (DAO) ........................................................................................................ 8

4.2.4 Parallel Control Port ........................................................................................................................... 8

4.2.5 External Memory Interface ................................................................................................................. 8

4.2.6 GPIO .................................................................................................................................................. 8

4.2.7 PLL-based Clock Generator ............................................................................................................... 8

4.3 DSP I/O Description ........................................................................................................................................ 8

4.3.1 Multiplexed Pins ................................................................................................................................. 8

4.3.2 Termination Requirements ................................................................................................................. 8

4.3.3 Pads ................................................................................................................................................... 9

4.4 Application Code Security ............................................................................................................................... 9

5. Characteristics and Specifications ............................................................................................. 10

5.1 Absolute Maximum Ratings .......................................................................................................................... 10

5.2 Recommended Operating Conditions ........................................................................................................... 10

5.3 Digital DC Characteristics ............................................................................................................................. 10

5.4 Power Supply Characteristics ........................................................................................................................11

5.5 Thermal Data (144-Pin LQFP) .......................................................................................................................11

5.6 Thermal Data (128-pin LQFP) .......................................................................................................................11

5.7 Switching Characteristics— RESET# ........................................................................................................... 12

5.8 Switching Characteristics — XTI .................................................................................................................. 12

5.9 Switching Characteristics — Internal Clock .................................................................................................. 13

5.10 Switching Characteristics — Serial Control Port - SPI Slave Mode ............................................................ 13

5.11 Switching Characteristics — Serial Control Port - SPI Master Mode .......................................................... 14

5.16 Switching Characteristics — Digital Audio Slave Input Port ....................................................................... 21

5.18 Switching Characteristics — Digital Audio Output Port ............................................................................... 23

5.19 Switching Characteristics — SDRAM Interface .......................................................................................... 24

6. Ordering Information .................................................................................................................... 28

7. Environmental, Manufacturing, and Handling Information ..................................................... 28

8. Device Pin-Out Diagram ............................................................................................................... 29

8.1 128-Pin LQFP Pin-Out Diagram ................................................................................................................... 29

8.2 144-Pin LQFP Pin-Out Diagram .................................................................................................................. 30