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DAC3282 Datasheet(PDF) 26 Page - Texas Instruments |
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DAC3282 Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 49 page  DAC3282 SLAS646 – DECEMBER 2009 www.ti.com Register name: CONFIG19 – Address: 0x13, Default: 0x00 Register Default Address Bit Name Function Name Value CONFIG 0x13 7 bequalsa When asserted the DACA data is driven onto DACB. 0 19 6 aequalsb When asserted the DACB data is driven onto DACA. 0 5 Reserved Reserved for factory use. 0 4 Unused Reserved for factory use. 0 3 Unused Reserved for factory use. 0 2 Unused Reserved for factory use. 0 1 multi_sync_sel Selects the signal source for multiple device and clock divider synchronization. 0 multit_sync_sel Sync Source 0 OSTR 1 FRAME through FIFO handoff 0 rev Reverse the input bits for the data word. MSB becomes LSB. 0 Register name: CONFIG20 – Address: 0x14, Default: 0x00 (CAUSES AUTOSYNC) Register Default Address Bit Name Function Name Value CONFIG20 0x14 7:0 qmc_offseta(7:0) Lower 8 bits of the DAC A offset correction. The offset is measured in 0x00 DAC LSBs. Writing this register causes an autosync to be generated. This loads the values of all four qmc_offset registers (CONFIG20-CONFIG23) into the offset block at the same time. When updating the offset values CONFIG20 should be written last. Programming any of the other three registers will not affect the offset setting. Register name: CONFIG21 – Address: 0x15, Default: 0x00 Register Default Address Bit Name Function Name Value CONFIG21 0x15 7:0 qmc_offsetb(7:0) Lower 8 bits of the DAC B offset correction. The offset is measured in 0x00 DAC LSBs. Register name: CONFIG22 – Address: 0x16, Default: 0x00 Register Default Address Bit Name Function Name Value CONFIG22 0x16 7:3 qmc_offseta(12:8 Upper 5 bits of the DAC A offset correction. 00000 ) 2 Unused Reserved for factory use. 0 1 Unused Reserved for factory use. 0 0 Unused Reserved for factory use. 0 26 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): DAC3282 |
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